1 /** @file 2 CPU Architectural Protocol as defined in PI spec Volume 2 DXE 3 4 This code abstracts the DXE core from processor implementation details. 5 6 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> 7 This program and the accompanying materials 8 are licensed and made available under the terms and conditions of the BSD License 9 which accompanies this distribution. The full text of the license may be found at 10 http://opensource.org/licenses/bsd-license.php 11 12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 15 **/ 16 17 #ifndef __ARCH_PROTOCOL_CPU_H__ 18 #define __ARCH_PROTOCOL_CPU_H__ 19 20 #include <Protocol/DebugSupport.h> 21 22 #define EFI_CPU_ARCH_PROTOCOL_GUID \ 23 { 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } } 24 25 typedef struct _EFI_CPU_ARCH_PROTOCOL EFI_CPU_ARCH_PROTOCOL; 26 27 /// 28 /// The type of flush operation 29 /// 30 typedef enum { 31 EfiCpuFlushTypeWriteBackInvalidate, 32 EfiCpuFlushTypeWriteBack, 33 EfiCpuFlushTypeInvalidate, 34 EfiCpuMaxFlushType 35 } EFI_CPU_FLUSH_TYPE; 36 37 /// 38 /// The type of processor INIT. 39 /// 40 typedef enum { 41 EfiCpuInit, 42 EfiCpuMaxInitType 43 } EFI_CPU_INIT_TYPE; 44 45 /** 46 EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs. 47 48 @param InterruptType Defines the type of interrupt or exception that 49 occurred on the processor.This parameter is processor architecture specific. 50 @param SystemContext A pointer to the processor context when 51 the interrupt occurred on the processor. 52 53 @return None 54 55 **/ 56 typedef 57 VOID 58 (EFIAPI *EFI_CPU_INTERRUPT_HANDLER)( 59 IN CONST EFI_EXCEPTION_TYPE InterruptType, 60 IN CONST EFI_SYSTEM_CONTEXT SystemContext 61 ); 62 63 /** 64 This function flushes the range of addresses from Start to Start+Length 65 from the processor's data cache. If Start is not aligned to a cache line 66 boundary, then the bytes before Start to the preceding cache line boundary 67 are also flushed. If Start+Length is not aligned to a cache line boundary, 68 then the bytes past Start+Length to the end of the next cache line boundary 69 are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be 70 supported. If the data cache is fully coherent with all DMA operations, then 71 this function can just return EFI_SUCCESS. If the processor does not support 72 flushing a range of the data cache, then the entire data cache can be flushed. 73 74 @param This The EFI_CPU_ARCH_PROTOCOL instance. 75 @param Start The beginning physical address to flush from the processor's data 76 cache. 77 @param Length The number of bytes to flush from the processor's data cache. This 78 function may flush more bytes than Length specifies depending upon 79 the granularity of the flush operation that the processor supports. 80 @param FlushType Specifies the type of flush operation to perform. 81 82 @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from 83 the processor's data cache. 84 @retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified 85 by FlushType. 86 @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed 87 from the processor's data cache. 88 89 **/ 90 typedef 91 EFI_STATUS 92 (EFIAPI *EFI_CPU_FLUSH_DATA_CACHE)( 93 IN EFI_CPU_ARCH_PROTOCOL *This, 94 IN EFI_PHYSICAL_ADDRESS Start, 95 IN UINT64 Length, 96 IN EFI_CPU_FLUSH_TYPE FlushType 97 ); 98 99 100 /** 101 This function enables interrupt processing by the processor. 102 103 @param This The EFI_CPU_ARCH_PROTOCOL instance. 104 105 @retval EFI_SUCCESS Interrupts are enabled on the processor. 106 @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor. 107 108 **/ 109 typedef 110 EFI_STATUS 111 (EFIAPI *EFI_CPU_ENABLE_INTERRUPT)( 112 IN EFI_CPU_ARCH_PROTOCOL *This 113 ); 114 115 116 /** 117 This function disables interrupt processing by the processor. 118 119 @param This The EFI_CPU_ARCH_PROTOCOL instance. 120 121 @retval EFI_SUCCESS Interrupts are disabled on the processor. 122 @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor. 123 124 **/ 125 typedef 126 EFI_STATUS 127 (EFIAPI *EFI_CPU_DISABLE_INTERRUPT)( 128 IN EFI_CPU_ARCH_PROTOCOL *This 129 ); 130 131 132 /** 133 This function retrieves the processor's current interrupt state a returns it in 134 State. If interrupts are currently enabled, then TRUE is returned. If interrupts 135 are currently disabled, then FALSE is returned. 136 137 @param This The EFI_CPU_ARCH_PROTOCOL instance. 138 @param State A pointer to the processor's current interrupt state. Set to TRUE if 139 interrupts are enabled and FALSE if interrupts are disabled. 140 141 @retval EFI_SUCCESS The processor's current interrupt state was returned in State. 142 @retval EFI_INVALID_PARAMETER State is NULL. 143 144 **/ 145 typedef 146 EFI_STATUS 147 (EFIAPI *EFI_CPU_GET_INTERRUPT_STATE)( 148 IN EFI_CPU_ARCH_PROTOCOL *This, 149 OUT BOOLEAN *State 150 ); 151 152 153 /** 154 This function generates an INIT on the processor. If this function succeeds, then the 155 processor will be reset, and control will not be returned to the caller. If InitType is 156 not supported by this processor, or the processor cannot programmatically generate an 157 INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error 158 occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned. 159 160 @param This The EFI_CPU_ARCH_PROTOCOL instance. 161 @param InitType The type of processor INIT to perform. 162 163 @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen. 164 @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported 165 by this processor. 166 @retval EFI_DEVICE_ERROR The processor INIT failed. 167 168 **/ 169 typedef 170 EFI_STATUS 171 (EFIAPI *EFI_CPU_INIT)( 172 IN EFI_CPU_ARCH_PROTOCOL *This, 173 IN EFI_CPU_INIT_TYPE InitType 174 ); 175 176 177 /** 178 This function registers and enables the handler specified by InterruptHandler for a processor 179 interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the 180 handler for the processor interrupt or exception type specified by InterruptType is uninstalled. 181 The installed handler is called once for each processor interrupt or exception. 182 183 @param This The EFI_CPU_ARCH_PROTOCOL instance. 184 @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts 185 are enabled and FALSE if interrupts are disabled. 186 @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called 187 when a processor interrupt occurs. If this parameter is NULL, then the handler 188 will be uninstalled. 189 190 @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled. 191 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was 192 previously installed. 193 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not 194 previously installed. 195 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported. 196 197 **/ 198 typedef 199 EFI_STATUS 200 (EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER)( 201 IN EFI_CPU_ARCH_PROTOCOL *This, 202 IN EFI_EXCEPTION_TYPE InterruptType, 203 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler 204 ); 205 206 207 /** 208 This function reads the processor timer specified by TimerIndex and returns it in TimerValue. 209 210 @param This The EFI_CPU_ARCH_PROTOCOL instance. 211 @param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter 212 must be between 0 and NumberOfTimers-1. 213 @param TimerValue Pointer to the returned timer value. 214 @param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment 215 of TimerValue. If TimerValue does not increment at a predictable rate, then 0 is 216 returned. This parameter is optional and may be NULL. 217 218 @retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue. 219 @retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers. 220 @retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid. 221 @retval EFI_UNSUPPORTED The processor does not have any readable timers. 222 223 **/ 224 typedef 225 EFI_STATUS 226 (EFIAPI *EFI_CPU_GET_TIMER_VALUE)( 227 IN EFI_CPU_ARCH_PROTOCOL *This, 228 IN UINT32 TimerIndex, 229 OUT UINT64 *TimerValue, 230 OUT UINT64 *TimerPeriod OPTIONAL 231 ); 232 233 234 /** 235 This function modifies the attributes for the memory region specified by BaseAddress and 236 Length from their current attributes to the attributes specified by Attributes. 237 238 @param This The EFI_CPU_ARCH_PROTOCOL instance. 239 @param BaseAddress The physical address that is the start address of a memory region. 240 @param Length The size in bytes of the memory region. 241 @param Attributes The bit mask of attributes to set for the memory region. 242 243 @retval EFI_SUCCESS The attributes were set for the memory region. 244 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by 245 BaseAddress and Length cannot be modified. 246 @retval EFI_INVALID_PARAMETER Length is zero. 247 Attributes specified an illegal combination of attributes that 248 cannot be set together. 249 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of 250 the memory resource range. 251 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory 252 resource range specified by BaseAddress and Length. 253 The bit mask of attributes is not support for the memory resource 254 range specified by BaseAddress and Length. 255 256 **/ 257 typedef 258 EFI_STATUS 259 (EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)( 260 IN EFI_CPU_ARCH_PROTOCOL *This, 261 IN EFI_PHYSICAL_ADDRESS BaseAddress, 262 IN UINT64 Length, 263 IN UINT64 Attributes 264 ); 265 266 267 /// 268 /// The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE 269 /// Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt 270 /// vectors and exception vectors, reading internal processor timers, resetting the processor, and 271 /// determining the processor frequency. 272 /// 273 struct _EFI_CPU_ARCH_PROTOCOL { 274 EFI_CPU_FLUSH_DATA_CACHE FlushDataCache; 275 EFI_CPU_ENABLE_INTERRUPT EnableInterrupt; 276 EFI_CPU_DISABLE_INTERRUPT DisableInterrupt; 277 EFI_CPU_GET_INTERRUPT_STATE GetInterruptState; 278 EFI_CPU_INIT Init; 279 EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler; 280 EFI_CPU_GET_TIMER_VALUE GetTimerValue; 281 EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes; 282 /// 283 /// The number of timers that are available in a processor. The value in this 284 /// field is a constant that must not be modified after the CPU Architectural 285 /// Protocol is installed. All consumers must treat this as a read-only field. 286 /// 287 UINT32 NumberOfTimers; 288 /// 289 /// The size, in bytes, of the alignment required for DMA buffer allocations. 290 /// This is typically the size of the largest data cache line in the platform. 291 /// The value in this field is a constant that must not be modified after the 292 /// CPU Architectural Protocol is installed. All consumers must treat this as 293 /// a read-only field. 294 /// 295 UINT32 DmaBufferAlignment; 296 }; 297 298 extern EFI_GUID gEfiCpuArchProtocolGuid; 299 300 #endif 301