1 #ifndef ARCH_X86_64_H
2 #define ARCH_X86_64_H
3
do_cpuid(unsigned int * eax,unsigned int * ebx,unsigned int * ecx,unsigned int * edx)4 static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
5 unsigned int *ecx, unsigned int *edx)
6 {
7 asm volatile("cpuid"
8 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
9 : "0" (*eax), "2" (*ecx)
10 : "memory");
11 }
12
13 #include "arch-x86-common.h"
14
15 #define FIO_ARCH (arch_x86_64)
16
17 #define FIO_HUGE_PAGE 2097152
18
19 #define nop __asm__ __volatile__("rep;nop": : :"memory")
20 #define read_barrier() __asm__ __volatile__("lfence":::"memory")
21 #define write_barrier() __asm__ __volatile__("sfence":::"memory")
22
arch_ffz(unsigned long bitmask)23 static inline unsigned long arch_ffz(unsigned long bitmask)
24 {
25 __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask));
26 return bitmask;
27 }
28
get_cpu_clock(void)29 static inline unsigned long long get_cpu_clock(void)
30 {
31 unsigned int lo, hi;
32
33 __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
34 return ((unsigned long long) hi << 32ULL) | lo;
35 }
36
37 #define ARCH_HAVE_FFZ
38 #define ARCH_HAVE_SSE4_2
39 #define ARCH_HAVE_CPU_CLOCK
40
41 #define RDRAND_LONG ".byte 0x48,0x0f,0xc7,0xf0"
42 #define RDSEED_LONG ".byte 0x48,0x0f,0xc7,0xf8"
43 #define RDRAND_RETRY 100
44
arch_rand_long(unsigned long * val)45 static inline int arch_rand_long(unsigned long *val)
46 {
47 int ok;
48
49 asm volatile("1: " RDRAND_LONG "\n\t"
50 "jc 2f\n\t"
51 "decl %0\n\t"
52 "jnz 1b\n\t"
53 "2:"
54 : "=r" (ok), "=a" (*val)
55 : "0" (RDRAND_RETRY));
56
57 return ok;
58 }
59
arch_rand_seed(unsigned long * seed)60 static inline int arch_rand_seed(unsigned long *seed)
61 {
62 unsigned char ok;
63
64 asm volatile(RDSEED_LONG "\n\t"
65 "setc %0"
66 : "=qm" (ok), "=a" (*seed));
67
68 return 0;
69 }
70
71 #endif
72