1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the BPFMCCodeEmitter class.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "MCTargetDesc/BPFMCTargetDesc.h"
15 #include "llvm/MC/MCCodeEmitter.h"
16 #include "llvm/MC/MCFixup.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/MCSymbol.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/Support/EndianStream.h"
24 #include "llvm/Support/raw_ostream.h"
25 using namespace llvm;
26
27 #define DEBUG_TYPE "mccodeemitter"
28
29 namespace {
30 class BPFMCCodeEmitter : public MCCodeEmitter {
31 BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete;
32 void operator=(const BPFMCCodeEmitter &) = delete;
33 const MCRegisterInfo &MRI;
34 bool IsLittleEndian;
35
36 public:
BPFMCCodeEmitter(const MCRegisterInfo & mri,bool IsLittleEndian)37 BPFMCCodeEmitter(const MCRegisterInfo &mri, bool IsLittleEndian)
38 : MRI(mri), IsLittleEndian(IsLittleEndian) {}
39
~BPFMCCodeEmitter()40 ~BPFMCCodeEmitter() {}
41
42 // getBinaryCodeForInstr - TableGen'erated function for getting the
43 // binary encoding for an instruction.
44 uint64_t getBinaryCodeForInstr(const MCInst &MI,
45 SmallVectorImpl<MCFixup> &Fixups,
46 const MCSubtargetInfo &STI) const;
47
48 // getMachineOpValue - Return binary encoding of operand. If the machin
49 // operand requires relocation, record the relocation and return zero.
50 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
51 SmallVectorImpl<MCFixup> &Fixups,
52 const MCSubtargetInfo &STI) const;
53
54 uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op,
55 SmallVectorImpl<MCFixup> &Fixups,
56 const MCSubtargetInfo &STI) const;
57
58 void encodeInstruction(const MCInst &MI, raw_ostream &OS,
59 SmallVectorImpl<MCFixup> &Fixups,
60 const MCSubtargetInfo &STI) const override;
61 };
62 }
63
createBPFMCCodeEmitter(const MCInstrInfo & MCII,const MCRegisterInfo & MRI,MCContext & Ctx)64 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII,
65 const MCRegisterInfo &MRI,
66 MCContext &Ctx) {
67 return new BPFMCCodeEmitter(MRI, true);
68 }
69
createBPFbeMCCodeEmitter(const MCInstrInfo & MCII,const MCRegisterInfo & MRI,MCContext & Ctx)70 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII,
71 const MCRegisterInfo &MRI,
72 MCContext &Ctx) {
73 return new BPFMCCodeEmitter(MRI, false);
74 }
75
getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const76 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
77 const MCOperand &MO,
78 SmallVectorImpl<MCFixup> &Fixups,
79 const MCSubtargetInfo &STI) const {
80 if (MO.isReg())
81 return MRI.getEncodingValue(MO.getReg());
82 if (MO.isImm())
83 return static_cast<unsigned>(MO.getImm());
84
85 assert(MO.isExpr());
86
87 const MCExpr *Expr = MO.getExpr();
88
89 assert(Expr->getKind() == MCExpr::SymbolRef);
90
91 if (MI.getOpcode() == BPF::JAL)
92 // func call name
93 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_4));
94 else if (MI.getOpcode() == BPF::LD_imm64)
95 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8));
96 else
97 // bb label
98 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2));
99
100 return 0;
101 }
102
SwapBits(uint8_t Val)103 static uint8_t SwapBits(uint8_t Val)
104 {
105 return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4;
106 }
107
encodeInstruction(const MCInst & MI,raw_ostream & OS,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const108 void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
109 SmallVectorImpl<MCFixup> &Fixups,
110 const MCSubtargetInfo &STI) const {
111 unsigned Opcode = MI.getOpcode();
112 support::endian::Writer<support::little> LE(OS);
113 support::endian::Writer<support::big> BE(OS);
114
115 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
116 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
117 LE.write<uint8_t>(Value >> 56);
118 if (IsLittleEndian)
119 LE.write<uint8_t>((Value >> 48) & 0xff);
120 else
121 LE.write<uint8_t>(SwapBits((Value >> 48) & 0xff));
122 LE.write<uint16_t>(0);
123 if (IsLittleEndian)
124 LE.write<uint32_t>(Value & 0xffffFFFF);
125 else
126 BE.write<uint32_t>(Value & 0xffffFFFF);
127
128 const MCOperand &MO = MI.getOperand(1);
129 uint64_t Imm = MO.isImm() ? MO.getImm() : 0;
130 LE.write<uint8_t>(0);
131 LE.write<uint8_t>(0);
132 LE.write<uint16_t>(0);
133 if (IsLittleEndian)
134 LE.write<uint32_t>(Imm >> 32);
135 else
136 BE.write<uint32_t>(Imm >> 32);
137 } else {
138 // Get instruction encoding and emit it
139 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
140 LE.write<uint8_t>(Value >> 56);
141 if (IsLittleEndian) {
142 LE.write<uint8_t>((Value >> 48) & 0xff);
143 LE.write<uint16_t>((Value >> 32) & 0xffff);
144 LE.write<uint32_t>(Value & 0xffffFFFF);
145 } else {
146 LE.write<uint8_t>(SwapBits((Value >> 48) & 0xff));
147 BE.write<uint16_t>((Value >> 32) & 0xffff);
148 BE.write<uint32_t>(Value & 0xffffFFFF);
149 }
150 }
151 }
152
153 // Encode BPF Memory Operand
getMemoryOpValue(const MCInst & MI,unsigned Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const154 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op,
155 SmallVectorImpl<MCFixup> &Fixups,
156 const MCSubtargetInfo &STI) const {
157 uint64_t Encoding;
158 const MCOperand Op1 = MI.getOperand(1);
159 assert(Op1.isReg() && "First operand is not register.");
160 Encoding = MRI.getEncodingValue(Op1.getReg());
161 Encoding <<= 16;
162 MCOperand Op2 = MI.getOperand(2);
163 assert(Op2.isImm() && "Second operand is not immediate.");
164 Encoding |= Op2.getImm() & 0xffff;
165 return Encoding;
166 }
167
168 #include "BPFGenMCCodeEmitter.inc"
169