1; RUN: llc < %s -march=cellspu 2 3declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b) 4define zeroext i1 @a(i16 %x) nounwind { 5 %res = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %x, i16 3) 6 %obil = extractvalue {i16, i1} %res, 1 7 ret i1 %obil 8} 9 10declare {i16, i1} @llvm.umul.with.overflow.i16(i16 %a, i16 %b) 11define zeroext i1 @b(i16 %x) nounwind { 12 %res = call {i16, i1} @llvm.umul.with.overflow.i16(i16 %x, i16 3) 13 %obil = extractvalue {i16, i1} %res, 1 14 ret i1 %obil 15} 16