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1This file is a partial list of people who have contributed to the LLVM
2project.  If you have contributed a patch or made some other contribution to
3LLVM, please submit a patch to this file to add yourself, and it will be
4done!
5
6The list is sorted by surname and formatted to allow easy grepping and
7beautification by scripts.  The fields are: name (N), email (E), web-address
8(W), PGP key ID and fingerprint (P), description (D), snail-mail address
9(S), and (I) IRC handle.
10
11N: Vikram Adve
12E: vadve@cs.uiuc.edu
13W: http://www.cs.uiuc.edu/~vadve/
14D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
15
16N: Owen Anderson
17E: resistor@mac.com
18D: LCSSA pass and related LoopUnswitch work
19D: GVNPRE pass, DataLayout refactoring, random improvements
20
21N: Henrik Bach
22D: MingW Win32 API portability layer
23
24N: Aaron Ballman
25E: aaron@aaronballman.com
26D: __declspec attributes, Windows support, general bug fixing
27
28N: Nate Begeman
29E: natebegeman@mac.com
30D: PowerPC backend developer
31D: Target-independent code generator and analysis improvements
32
33N: Daniel Berlin
34E: dberlin@dberlin.org
35D: ET-Forest implementation.
36D: Sparse bitmap
37
38N: David Blaikie
39E: dblaikie@gmail.com
40D: General bug fixing/fit & finish, mostly in Clang
41
42N: Neil Booth
43E: neil@daikokuya.co.uk
44D: APFloat implementation.
45
46N: Misha Brukman
47E: brukman+llvm@uiuc.edu
48W: http://misha.brukman.net
49D: Portions of X86 and Sparc JIT compilers, PowerPC backend
50D: Incremental bitcode loader
51
52N: Cameron Buschardt
53E: buschard@uiuc.edu
54D: The `mem2reg' pass - promotes values stored in memory to registers
55
56N: Brendon Cahoon
57E: bcahoon@codeaurora.org
58D: Loop unrolling with run-time trip counts.
59
60N: Chandler Carruth
61E: chandlerc@gmail.com
62E: chandlerc@google.com
63D: Hashing algorithms and interfaces
64D: Inline cost analysis
65D: Machine block placement pass
66D: SROA
67
68N: Casey Carter
69E: ccarter@uiuc.edu
70D: Fixes to the Reassociation pass, various improvement patches
71
72N: Evan Cheng
73E: evan.cheng@apple.com
74D: ARM and X86 backends
75D: Instruction scheduler improvements
76D: Register allocator improvements
77D: Loop optimizer improvements
78D: Target-independent code generator improvements
79
80N: Dan Villiom Podlaski Christiansen
81E: danchr@gmail.com
82E: danchr@cs.au.dk
83W: http://villiom.dk
84D: LLVM Makefile improvements
85D: Clang diagnostic & driver tweaks
86S: Aarhus, Denmark
87
88N: Jeff Cohen
89E: jeffc@jolt-lang.org
90W: http://jolt-lang.org
91D: Native Win32 API portability layer
92
93N: John T. Criswell
94E: criswell@uiuc.edu
95D: Original Autoconf support, documentation improvements, bug fixes
96
97N: Anshuman Dasgupta
98E: adasgupt@codeaurora.org
99D: Deterministic finite automaton based infrastructure for VLIW packetization
100
101N: Stefanus Du Toit
102E: stefanus.du.toit@intel.com
103D: Bug fixes and minor improvements
104
105N: Rafael Avila de Espindola
106E: rafael.espindola@gmail.com
107D: The ARM backend
108
109N: Dave Estes
110E: cestes@codeaurora.org
111D: AArch64 machine description for Cortex-A53
112
113N: Alkis Evlogimenos
114E: alkis@evlogimenos.com
115D: Linear scan register allocator, many codegen improvements, Java frontend
116
117N: Hal Finkel
118E: hfinkel@anl.gov
119D: Basic-block autovectorization, PowerPC backend improvements
120
121N: Eric Fiselier
122E: eric@efcs.ca
123D: LIT patches and documentation.
124
125N: Ryan Flynn
126E: pizza@parseerror.com
127D: Miscellaneous bug fixes
128
129N: Brian Gaeke
130E: gaeke@uiuc.edu
131W: http://www.students.uiuc.edu/~gaeke/
132D: Portions of X86 static and JIT compilers; initial SparcV8 backend
133D: Dynamic trace optimizer
134D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
135
136N: Nicolas Geoffray
137E: nicolas.geoffray@lip6.fr
138W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
139D: PPC backend fixes for Linux
140
141N: Louis Gerbarg
142E: lgg@apple.com
143D: Portions of the PowerPC backend
144
145N: Saem Ghani
146E: saemghani@gmail.com
147D: Callgraph class cleanups
148
149N: Mikhail Glushenkov
150E: foldr@codedgers.com
151D: Author of llvmc2
152
153N: Dan Gohman
154E: sunfish@mozilla.com
155D: Miscellaneous bug fixes
156D: WebAssembly Backend
157
158N: David Goodwin
159E: david@goodwinz.net
160D: Thumb-2 code generator
161
162N: David Greene
163E: greened@obbligato.org
164D: Miscellaneous bug fixes
165D: Register allocation refactoring
166
167N: Gabor Greif
168E: ggreif@gmail.com
169D: Improvements for space efficiency
170
171N: James Grosbach
172E: grosbach@apple.com
173I: grosbach
174D: SjLj exception handling support
175D: General fixes and improvements for the ARM back-end
176D: MCJIT
177D: ARM integrated assembler and assembly parser
178D: Led effort for the backend formerly known as ARM64
179
180N: Lang Hames
181E: lhames@gmail.com
182D: PBQP-based register allocator
183
184N: Gordon Henriksen
185E: gordonhenriksen@mac.com
186D: Pluggable GC support
187D: C interface
188D: Ocaml bindings
189
190N: Raul Fernandes Herbster
191E: raul@dsc.ufcg.edu.br
192D: JIT support for ARM
193
194N: Paolo Invernizzi
195E: arathorn@fastwebnet.it
196D: Visual C++ compatibility fixes
197
198N: Patrick Jenkins
199E: patjenk@wam.umd.edu
200D: Nightly Tester
201
202N: Dale Johannesen
203E: dalej@apple.com
204D: ARM constant islands improvements
205D: Tail merging improvements
206D: Rewrite X87 back end
207D: Use APFloat for floating point constants widely throughout compiler
208D: Implement X87 long double
209
210N: Brad Jones
211E: kungfoomaster@nondot.org
212D: Support for packed types
213
214N: Rod Kay
215E: rkay@auroraux.org
216D: Author of LLVM Ada bindings
217
218N: Eric Kidd
219W: http://randomhacks.net/
220D: llvm-config script
221
222N: Anton Korobeynikov
223E: asl@math.spbu.ru
224D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
225D: x86/linux PIC codegen, aliases, regparm/visibility attributes
226D: Switch lowering refactoring
227
228N: Sumant Kowshik
229E: kowshik@uiuc.edu
230D: Author of the original C backend
231
232N: Benjamin Kramer
233E: benny.kra@gmail.com
234D: Miscellaneous bug fixes
235
236N: Sundeep Kushwaha
237E: sundeepk@codeaurora.org
238D: Implemented DFA-based target independent VLIW packetizer
239
240N: Christopher Lamb
241E: christopher.lamb@gmail.com
242D: aligned load/store support, parts of noalias and restrict support
243D: vreg subreg infrastructure, X86 codegen improvements based on subregs
244D: address spaces
245
246N: Jim Laskey
247E: jlaskey@apple.com
248D: Improvements to the PPC backend, instruction scheduling
249D: Debug and Dwarf implementation
250D: Auto upgrade mangler
251D: llvm-gcc4 svn wrangler
252
253N: Chris Lattner
254E: sabre@nondot.org
255W: http://nondot.org/~sabre/
256D: Primary architect of LLVM
257
258N: Tanya Lattner (Tanya Brethour)
259E: tonic@nondot.org
260W: http://nondot.org/~tonic/
261D: The initial llvm-ar tool, converted regression testsuite to dejagnu
262D: Modulo scheduling in the SparcV9 backend
263D: Release manager (1.7+)
264
265N: Sylvestre Ledru
266E: sylvestre@debian.org
267W: http://sylvestre.ledru.info/
268W: http://llvm.org/apt/
269D: Debian and Ubuntu packaging
270D: Continuous integration with jenkins
271
272N: Andrew Lenharth
273E: alenhar2@cs.uiuc.edu
274W: http://www.lenharth.org/~andrewl/
275D: Alpha backend
276D: Sampling based profiling
277
278N: Nick Lewycky
279E: nicholas@mxc.ca
280D: PredicateSimplifier pass
281
282N: Tony Linthicum, et. al.
283E: tlinth@codeaurora.org
284D: Backend for Qualcomm's Hexagon VLIW processor.
285
286N: Bruno Cardoso Lopes
287E: bruno.cardoso@gmail.com
288I: bruno
289W: http://brunocardoso.cc
290D: Mips backend
291D: Random ARM integrated assembler and assembly parser improvements
292D: General X86 AVX1 support
293
294N: Duraid Madina
295E: duraid@octopus.com.au
296W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
297D: IA64 backend, BigBlock register allocator
298
299N: John McCall
300E: rjmccall@apple.com
301D: Clang semantic analysis and IR generation
302
303N: Michael McCracken
304E: michael.mccracken@gmail.com
305D: Line number support for llvmgcc
306
307N: Vladimir Merzliakov
308E: wanderer@rsu.ru
309D: Test suite fixes for FreeBSD
310
311N: Scott Michel
312E: scottm@aero.org
313D: Added STI Cell SPU backend.
314
315N: Kai Nacke
316E: kai@redstar.de
317D: Support for implicit TLS model used with MS VC runtime
318D: Dumping of Win64 EH structures
319
320N: Takumi Nakamura
321E: geek4civic@gmail.com
322E: chapuni@hf.rim.or.jp
323D: Cygwin and MinGW support.
324D: Win32 tweaks.
325S: Yokohama, Japan
326
327N: Edward O'Callaghan
328E: eocallaghan@auroraux.org
329W: http://www.auroraux.org
330D: Add Clang support with various other improvements to utils/NewNightlyTest.pl
331D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings
332D: and error clean ups.
333
334N: Morten Ofstad
335E: morten@hue.no
336D: Visual C++ compatibility fixes
337
338N: Jakob Stoklund Olesen
339E: stoklund@2pi.dk
340D: Machine code verifier
341D: Blackfin backend
342D: Fast register allocator
343D: Greedy register allocator
344
345N: Richard Osborne
346E: richard@xmos.com
347D: XCore backend
348
349N: Piotr Padlewski
350E: piotr.padlewski@gmail.com
351D: !invariant.group metadata and other intrinsics for devirtualization in clang
352
353N: Devang Patel
354E: dpatel@apple.com
355D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
356D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
357D: Optimizer improvements, Loop Index Split
358
359N: Ana Pazos
360E: apazos@codeaurora.org
361D: Fixes and improvements to the AArch64 backend
362
363N: Wesley Peck
364E: peckw@wesleypeck.com
365W: http://wesleypeck.com/
366D: MicroBlaze backend
367
368N: Francois Pichet
369E: pichet2000@gmail.com
370D: MSVC support
371
372N: Adrian Prantl
373E: aprantl@apple.com
374D: Debug Information
375
376N: Vladimir Prus
377W: http://vladimir_prus.blogspot.com
378E: ghost@cs.msu.su
379D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
380
381N: Kalle Raiskila
382E: kalle.rasikila@nokia.com
383D: Some bugfixes to CellSPU
384
385N: Xerxes Ranby
386E: xerxes@zafena.se
387D: Cmake dependency chain and various bug fixes
388
389N: Alex Rosenberg
390E: alexr@leftfield.org
391I: arosenberg
392D: ARM calling conventions rewrite, hard float support
393
394N: Chad Rosier
395E: mcrosier@codeaurora.org
396I: mcrosier
397D: AArch64 fast instruction selection pass
398D: Fixes and improvements to the ARM fast-isel pass
399D: Fixes and improvements to the AArch64 backend
400
401N: Nadav Rotem
402E: nadav.rotem@me.com
403D: X86 code generation improvements, Loop Vectorizer, SLP Vectorizer
404
405N: Roman Samoilov
406E: roman@codedgers.com
407D: MSIL backend
408
409N: Duncan Sands
410E: baldrick@free.fr
411I: baldrick
412D: Ada support in llvm-gcc
413D: Dragonegg plugin
414D: Exception handling improvements
415D: Type legalizer rewrite
416
417N: Ruchira Sasanka
418E: sasanka@uiuc.edu
419D: Graph coloring register allocator for the Sparc64 backend
420
421N: Arnold Schwaighofer
422E: arnold.schwaighofer@gmail.com
423D: Tail call optimization for the x86 backend
424
425N: Shantonu Sen
426E: ssen@apple.com
427D: Miscellaneous bug fixes
428
429N: Anand Shukla
430E: ashukla@cs.uiuc.edu
431D: The `paths' pass
432
433N: Michael J. Spencer
434E: bigcheesegs@gmail.com
435D: Shepherding Windows COFF support into MC.
436D: Lots of Windows stuff.
437
438N: Reid Spencer
439E: rspencer@reidspencer.com
440W: http://reidspencer.com/
441D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
442
443N: Alp Toker
444E: alp@nuanti.com
445W: http://atoker.com/
446D: C++ frontend next generation standards implementation
447
448N: Craig Topper
449E: craig.topper@gmail.com
450D: X86 codegen and disassembler improvements. AVX2 support.
451
452N: Edwin Torok
453E: edwintorok@gmail.com
454D: Miscellaneous bug fixes
455
456N: Adam Treat
457E: manyoso@yahoo.com
458D: C++ bugs filed, and C++ front-end bug fixes.
459
460N: Lauro Ramos Venancio
461E: lauro.venancio@indt.org.br
462D: ARM backend improvements
463D: Thread Local Storage implementation
464
465N: Bill Wendling
466I: wendling
467E: isanbard@gmail.com
468D: Release manager, IR Linker, LTO
469D: Bunches of stuff
470
471N: Bob Wilson
472E: bob.wilson@acm.org
473D: Advanced SIMD (NEON) support in the ARM backend.
474