1; Show that we can translate IR instruction "trap". 2 3; REQUIRES: allow_dump 4 5; Compile using standalone assembler. 6; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 7; RUN: | FileCheck %s --check-prefix=ASM 8 9; Show bytes in assembled standalone code. 10; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 11; RUN: --args -Om1 \ 12; RUN: | FileCheck %s --check-prefix=DIS 13 14; Compile using integrated assembler. 15; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 16; RUN: | FileCheck %s --check-prefix=IASM 17 18; Show bytes in assembled integrated code. 19; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 20; RUN: --args -Om1 \ 21; RUN: | FileCheck %s --check-prefix=DIS 22 23; testUnreachable generates a trap for the unreachable instruction. 24 25define internal void @testUnreachable() { 26; ASM-LABEL: testUnreachable: 27; DIS-LABEL: 00000000 <testUnreachable>: 28 29 unreachable 30 31; ASM: .long 0xe7fedef0 32; DIS-NEXT: 0: e7fedef0 33; IASM-NOT: .long 0xe7fedef0 34} 35 36; testTrap uses integer division to test this, since a trap is 37; inserted if one divides by zero. 38 39define internal i32 @testTrap(i32 %v1, i32 %v2) { 40; ASM-LABEL: testTrap: 41; DIS-LABEL: 00000010 <testTrap>: 42; IASM-LABEL: testTrap: 43 44 %res = udiv i32 %v1, %v2 45 46; ASM: bne 47; DIS: 28: 1a000000 48; IASM-NOT: bne 49 50; ASM-NEXT: .long 0xe7fedef0 51; DIS-NEXT: 2c: e7fedef0 52; IASM-NOT: .long 0xe7fedef0 53 54 ret i32 %res 55} 56