1; Show that we know how to translate the fabs intrinsic on float vectors. 2 3; REQUIRES: allow_dump 4 5; Compile using standalone assembler. 6; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 7; RUN: -reg-use q5 \ 8; RUN: | FileCheck %s --check-prefix=ASM 9 10; Show bytes in assembled standalone code. 11; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 12; RUN: --args -Om1 \ 13; RUN: -reg-use q5 \ 14; RUN: | FileCheck %s --check-prefix=DIS 15 16; Compile using integrated assembler. 17; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 18; RUN: -reg-use q5 \ 19; RUN: | FileCheck %s --check-prefix=IASM 20 21; Show bytes in assembled integrated code. 22; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 23; RUN: --args -Om1 \ 24; RUN: -reg-use q5 \ 25; RUN: | FileCheck %s --check-prefix=DIS 26 27declare <4 x float> @llvm.fabs.v4f32(<4 x float>) 28 29define internal <4 x float> @_Z6myFabsDv4_f(<4 x float> %a) { 30; ASM-LABEL: _Z6myFabsDv4_f: 31; DIS-LABEL: {{.+}} <_Z6myFabsDv4_f>: 32; IASM-LABEL: _Z6myFabsDv4_f: 33 34 %x = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a) 35 36; ASM: vabs.f32 q5, q5 37; DIS: {{.+}}: f3b9a74a 38; IASM-NOT: vabs.f32 39 40 ret <4 x float> %x 41} 42