1 /* 2 * Copyright (C) 2016 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef _LIBUNWINDSTACK_MACHINE_H 18 #define _LIBUNWINDSTACK_MACHINE_H 19 20 #include <stdint.h> 21 22 namespace unwindstack { 23 24 enum ArmReg : uint16_t { 25 ARM_REG_R0 = 0, 26 ARM_REG_R1, 27 ARM_REG_R2, 28 ARM_REG_R3, 29 ARM_REG_R4, 30 ARM_REG_R5, 31 ARM_REG_R6, 32 ARM_REG_R7, 33 ARM_REG_R8, 34 ARM_REG_R9, 35 ARM_REG_R10, 36 ARM_REG_R11, 37 ARM_REG_R12, 38 ARM_REG_R13, 39 ARM_REG_R14, 40 ARM_REG_R15, 41 ARM_REG_LAST, 42 43 ARM_REG_SP = ARM_REG_R13, 44 ARM_REG_LR = ARM_REG_R14, 45 ARM_REG_PC = ARM_REG_R15, 46 }; 47 48 enum Arm64Reg : uint16_t { 49 ARM64_REG_R0 = 0, 50 ARM64_REG_R1, 51 ARM64_REG_R2, 52 ARM64_REG_R3, 53 ARM64_REG_R4, 54 ARM64_REG_R5, 55 ARM64_REG_R6, 56 ARM64_REG_R7, 57 ARM64_REG_R8, 58 ARM64_REG_R9, 59 ARM64_REG_R10, 60 ARM64_REG_R11, 61 ARM64_REG_R12, 62 ARM64_REG_R13, 63 ARM64_REG_R14, 64 ARM64_REG_R15, 65 ARM64_REG_R16, 66 ARM64_REG_R17, 67 ARM64_REG_R18, 68 ARM64_REG_R19, 69 ARM64_REG_R20, 70 ARM64_REG_R21, 71 ARM64_REG_R22, 72 ARM64_REG_R23, 73 ARM64_REG_R24, 74 ARM64_REG_R25, 75 ARM64_REG_R26, 76 ARM64_REG_R27, 77 ARM64_REG_R28, 78 ARM64_REG_R29, 79 ARM64_REG_R30, 80 ARM64_REG_R31, 81 ARM64_REG_PC, 82 ARM64_REG_LAST, 83 84 ARM64_REG_SP = ARM64_REG_R31, 85 ARM64_REG_LR = ARM64_REG_R30, 86 }; 87 88 // Matches the numbers for the registers as generated by compilers. 89 // If this is changed, then unwinding will fail. 90 enum X86Reg : uint16_t { 91 X86_REG_EAX = 0, 92 X86_REG_ECX = 1, 93 X86_REG_EDX = 2, 94 X86_REG_EBX = 3, 95 X86_REG_ESP = 4, 96 X86_REG_EBP = 5, 97 X86_REG_ESI = 6, 98 X86_REG_EDI = 7, 99 X86_REG_EIP = 8, 100 X86_REG_EFL = 9, 101 X86_REG_CS = 10, 102 X86_REG_SS = 11, 103 X86_REG_DS = 12, 104 X86_REG_ES = 13, 105 X86_REG_FS = 14, 106 X86_REG_GS = 15, 107 X86_REG_LAST, 108 109 X86_REG_SP = X86_REG_ESP, 110 X86_REG_PC = X86_REG_EIP, 111 }; 112 113 // Matches the numbers for the registers as generated by compilers. 114 // If this is changed, then unwinding will fail. 115 enum X86_64Reg : uint16_t { 116 X86_64_REG_RAX = 0, 117 X86_64_REG_RDX = 1, 118 X86_64_REG_RCX = 2, 119 X86_64_REG_RBX = 3, 120 X86_64_REG_RSI = 4, 121 X86_64_REG_RDI = 5, 122 X86_64_REG_RBP = 6, 123 X86_64_REG_RSP = 7, 124 X86_64_REG_R8 = 8, 125 X86_64_REG_R9 = 9, 126 X86_64_REG_R10 = 10, 127 X86_64_REG_R11 = 11, 128 X86_64_REG_R12 = 12, 129 X86_64_REG_R13 = 13, 130 X86_64_REG_R14 = 14, 131 X86_64_REG_R15 = 15, 132 X86_64_REG_RIP = 16, 133 X86_64_REG_LAST, 134 135 X86_64_REG_SP = X86_64_REG_RSP, 136 X86_64_REG_PC = X86_64_REG_RIP, 137 }; 138 139 } // namespace unwindstack 140 141 #endif // _LIBUNWINDSTACK_MACHINE_H 142