Lines Matching refs:__m256
319 _mm512_cvtps_epi64 (__m256 __A) { in _mm512_cvtps_epi64()
327 _mm512_mask_cvtps_epi64 (__m512i __W, __mmask8 __U, __m256 __A) { in _mm512_mask_cvtps_epi64()
335 _mm512_maskz_cvtps_epi64 (__mmask8 __U, __m256 __A) { in _mm512_maskz_cvtps_epi64()
343 (__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
348 (__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
353 (__m512i)__builtin_ia32_cvtps2qq512_mask((__v8sf)(__m256)(A), \
358 _mm512_cvtps_epu64 (__m256 __A) { in _mm512_cvtps_epu64()
366 _mm512_mask_cvtps_epu64 (__m512i __W, __mmask8 __U, __m256 __A) { in _mm512_mask_cvtps_epu64()
374 _mm512_maskz_cvtps_epu64 (__mmask8 __U, __m256 __A) { in _mm512_maskz_cvtps_epu64()
382 (__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
387 (__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
392 (__m512i)__builtin_ia32_cvtps2uqq512_mask((__v8sf)(__m256)(A), \
436 static __inline__ __m256 __DEFAULT_FN_ATTRS
438 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, in _mm512_cvtepi64_ps()
444 static __inline__ __m256 __DEFAULT_FN_ATTRS
445 _mm512_mask_cvtepi64_ps (__m256 __W, __mmask8 __U, __m512i __A) { in _mm512_mask_cvtepi64_ps()
446 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, in _mm512_mask_cvtepi64_ps()
452 static __inline__ __m256 __DEFAULT_FN_ATTRS
454 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, in _mm512_maskz_cvtepi64_ps()
461 (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
466 (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
467 (__v8sf)(__m256)(W), (__mmask8)(U), \
471 (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
555 _mm512_cvttps_epi64 (__m256 __A) { in _mm512_cvttps_epi64()
563 _mm512_mask_cvttps_epi64 (__m512i __W, __mmask8 __U, __m256 __A) { in _mm512_mask_cvttps_epi64()
571 _mm512_maskz_cvttps_epi64 (__mmask8 __U, __m256 __A) { in _mm512_maskz_cvttps_epi64()
579 (__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
584 (__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
589 (__m512i)__builtin_ia32_cvttps2qq512_mask((__v8sf)(__m256)(A), \
594 _mm512_cvttps_epu64 (__m256 __A) { in _mm512_cvttps_epu64()
602 _mm512_mask_cvttps_epu64 (__m512i __W, __mmask8 __U, __m256 __A) { in _mm512_mask_cvttps_epu64()
610 _mm512_maskz_cvttps_epu64 (__mmask8 __U, __m256 __A) { in _mm512_maskz_cvttps_epu64()
618 (__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
623 (__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
628 (__m512i)__builtin_ia32_cvttps2uqq512_mask((__v8sf)(__m256)(A), \
673 static __inline__ __m256 __DEFAULT_FN_ATTRS
675 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, in _mm512_cvtepu64_ps()
681 static __inline__ __m256 __DEFAULT_FN_ATTRS
682 _mm512_mask_cvtepu64_ps (__m256 __W, __mmask8 __U, __m512i __A) { in _mm512_mask_cvtepu64_ps()
683 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, in _mm512_mask_cvtepu64_ps()
689 static __inline__ __m256 __DEFAULT_FN_ATTRS
691 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, in _mm512_maskz_cvtepu64_ps()
698 (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
703 (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
704 (__v8sf)(__m256)(W), (__mmask8)(U), \
708 (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
1033 _mm512_broadcast_f32x8 (__m256 __A) in _mm512_broadcast_f32x8()
1041 _mm512_mask_broadcast_f32x8 (__m512 __O, __mmask16 __M, __m256 __A) in _mm512_mask_broadcast_f32x8()
1049 _mm512_maskz_broadcast_f32x8 (__mmask16 __M, __m256 __A) in _mm512_maskz_broadcast_f32x8()
1154 (__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \
1159 (__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \
1160 (__v8sf)(__m256)(W), \
1164 (__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \
1221 (__v8sf)(__m256)(B), (int)(imm), \
1227 (__v8sf)(__m256)(B), (int)(imm), \
1233 (__v8sf)(__m256)(B), (int)(imm), \