Lines Matching refs:LV
78 LiveVariables *LV; member in __anonab29adac0111::TwoAddressInstructionPass
299 if (LV) in sink3AddrInstruction()
300 LV->replaceKillInstruction(SavedReg, *KillMI, *MI); in sink3AddrInstruction()
697 MachineInstr *NewMI = TII->convertToThreeAddress(MFI, *mi, LV); in convertInstTo3Addr()
821 if (!LV && !LIS) in rescheduleMIBelowKill()
844 KillMI = LV->getVarInfo(Reg).findKill(MBB); in rescheduleMIBelowKill()
971 LV->removeVirtualRegisterKilled(Reg, *KillMI); in rescheduleMIBelowKill()
972 LV->addVirtualRegisterKilled(Reg, *MI); in rescheduleMIBelowKill()
1008 if (!LV && !LIS) in rescheduleKillAboveMI()
1031 KillMI = LV->getVarInfo(Reg).findKill(MBB); in rescheduleKillAboveMI()
1138 LV->removeVirtualRegisterKilled(Reg, *KillMI); in rescheduleKillAboveMI()
1139 LV->addVirtualRegisterKilled(Reg, *MI); in rescheduleKillAboveMI()
1337 if (LV) { in tryInstructionTransform()
1345 LV->replaceKillInstruction(MO.getReg(), MI, *NewMIs[0]); in tryInstructionTransform()
1349 LV->replaceKillInstruction(MO.getReg(), MI, *NewMIs[1]); in tryInstructionTransform()
1352 } else if (LV->removeVirtualRegisterDead(MO.getReg(), MI)) { in tryInstructionTransform()
1354 LV->addVirtualRegisterDead(MO.getReg(), *NewMIs[1]); in tryInstructionTransform()
1358 LV->addVirtualRegisterDead(MO.getReg(), *NewMIs[0]); in tryInstructionTransform()
1363 LV->addVirtualRegisterKilled(Reg, *NewMIs[1]); in tryInstructionTransform()
1572 if (RemovedKillFlag && LV && LV->getVarInfo(RegB).removeKill(*MI)) { in processTiedPairs()
1575 LV->addVirtualRegisterKilled(RegB, *PrevMI); in processTiedPairs()
1612 LV = getAnalysisIfAvailable<LiveVariables>(); in runOnMachineFunction()
1784 if (LV && isKill && !TargetRegisterInfo::isPhysicalRegister(SrcReg)) in eliminateRegSequence()
1785 LV->replaceKillInstruction(SrcReg, MI, *CopyMI); in eliminateRegSequence()