Lines Matching refs:SDValue
46 SDValue Cond = N->getOperand(1); in isCBranchSCC()
71 bool FoldOperand(SDValue &Src, SDValue &Sel, SDValue &Neg, SDValue &Abs,
73 bool FoldOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
74 bool FoldDotOperands(unsigned, const R600InstrInfo *, std::vector<SDValue> &);
82 bool SelectGlobalValueConstantOffset(SDValue Addr, SDValue& IntPtr);
83 bool SelectGlobalValueVariableOffset(SDValue Addr, SDValue &BaseReg,
84 SDValue& Offset);
85 bool SelectADDRVTX_READ(SDValue Addr, SDValue &Base, SDValue &Offset);
86 bool SelectADDRIndirect(SDValue Addr, SDValue &Base, SDValue &Offset);
87 bool isDSOffsetLegal(const SDValue &Base, unsigned Offset,
89 bool SelectDS1Addr1Offset(SDValue Ptr, SDValue &Base, SDValue &Offset) const;
90 bool SelectDS64Bit4ByteAligned(SDValue Ptr, SDValue &Base, SDValue &Offset0,
91 SDValue &Offset1) const;
92 bool SelectMUBUF(SDValue Addr, SDValue &SRsrc, SDValue &VAddr,
93 SDValue &SOffset, SDValue &Offset, SDValue &Offen,
94 SDValue &Idxen, SDValue &Addr64, SDValue &GLC, SDValue &SLC,
95 SDValue &TFE) const;
96 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, SDValue &VAddr,
97 SDValue &SOffset, SDValue &Offset, SDValue &GLC,
98 SDValue &SLC, SDValue &TFE) const;
99 bool SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc,
100 SDValue &VAddr, SDValue &SOffset, SDValue &Offset,
101 SDValue &SLC) const;
102 bool SelectMUBUFScratch(SDValue Addr, SDValue &RSrc, SDValue &VAddr,
103 SDValue &SOffset, SDValue &ImmOffset) const;
104 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &SOffset,
105 SDValue &Offset, SDValue &GLC, SDValue &SLC,
106 SDValue &TFE) const;
107 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset,
108 SDValue &Offset, SDValue &SLC) const;
109 bool SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, SDValue &Soffset,
110 SDValue &Offset) const;
111 bool SelectMUBUFConstant(SDValue Constant,
112 SDValue &SOffset,
113 SDValue &ImmOffset) const;
114 bool SelectMUBUFIntrinsicOffset(SDValue Offset, SDValue &SOffset,
115 SDValue &ImmOffset) const;
116 bool SelectMUBUFIntrinsicVOffset(SDValue Offset, SDValue &SOffset,
117 SDValue &ImmOffset, SDValue &VOffset) const;
119 bool SelectFlat(SDValue Addr, SDValue &VAddr,
120 SDValue &SLC, SDValue &TFE) const;
122 bool SelectSMRDOffset(SDValue ByteOffsetNode, SDValue &Offset,
124 bool SelectSMRD(SDValue Addr, SDValue &SBase, SDValue &Offset,
126 bool SelectSMRDImm(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
127 bool SelectSMRDImm32(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
128 bool SelectSMRDSgpr(SDValue Addr, SDValue &SBase, SDValue &Offset) const;
129 bool SelectSMRDBufferImm(SDValue Addr, SDValue &Offset) const;
130 bool SelectSMRDBufferImm32(SDValue Addr, SDValue &Offset) const;
131 bool SelectSMRDBufferSgpr(SDValue Addr, SDValue &Offset) const;
132 bool SelectMOVRELOffset(SDValue Index, SDValue &Base, SDValue &Offset) const;
133 bool SelectVOP3Mods(SDValue In, SDValue &Src, SDValue &SrcMods) const;
134 bool SelectVOP3NoMods(SDValue In, SDValue &Src, SDValue &SrcMods) const;
135 bool SelectVOP3Mods0(SDValue In, SDValue &Src, SDValue &SrcMods,
136 SDValue &Clamp, SDValue &Omod) const;
137 bool SelectVOP3NoMods0(SDValue In, SDValue &Src, SDValue &SrcMods,
138 SDValue &Clamp, SDValue &Omod) const;
140 bool SelectVOP3Mods0Clamp(SDValue In, SDValue &Src, SDValue &SrcMods,
141 SDValue &Omod) const;
142 bool SelectVOP3Mods0Clamp0OMod(SDValue In, SDValue &Src, SDValue &SrcMods,
143 SDValue &Clamp,
144 SDValue &Omod) const;
149 SDNode *getS_BFE(unsigned Opcode, const SDLoc &DL, SDValue Val,
211 SDValue SubRegOp = N->getOperand(OpNo + 1); in getOperandRegClass()
229 SDValue M0 = Lowering.copyToM0(*CurDAG, CurDAG->getEntryNode(), SDLoc(N), in glueCopyToM0()
232 SDValue Glue = M0.getValue(1); in glueCopyToM0()
234 SmallVector <SDValue, 8> Ops; in glueCopyToM0()
315 SDValue RegClass = CurDAG->getTargetConstant(RegClassID, DL, MVT::i32); in Select()
328 SmallVector<SDValue, 16 * 2 + 1> RegSeqArgs(NumVectorElts * 2 + 1); in Select()
352 RegSeqArgs[1 + (2 * i)] = SDValue(ImpDef, 0); in Select()
364 SDValue RC, SubReg0, SubReg1; in Select()
380 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0, in Select()
407 const SDValue Ops[] = { in Select()
409 SDValue(Lo, 0), CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32), in Select()
410 SDValue(Hi, 0), CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32) in Select()
509 bool AMDGPUDAGToDAGISel::SelectGlobalValueConstantOffset(SDValue Addr, in SelectGlobalValueConstantOffset()
510 SDValue& IntPtr) { in SelectGlobalValueConstantOffset()
519 bool AMDGPUDAGToDAGISel::SelectGlobalValueVariableOffset(SDValue Addr, in SelectGlobalValueVariableOffset()
520 SDValue& BaseReg, SDValue &Offset) { in SelectGlobalValueVariableOffset()
529 bool AMDGPUDAGToDAGISel::SelectADDRVTX_READ(SDValue Addr, SDValue &Base, in SelectADDRVTX_READ()
530 SDValue &Offset) { in SelectADDRVTX_READ()
558 bool AMDGPUDAGToDAGISel::SelectADDRIndirect(SDValue Addr, SDValue &Base, in SelectADDRIndirect()
559 SDValue &Offset) { in SelectADDRIndirect()
580 SDValue LHS = N->getOperand(0); in SelectADD_SUB_I64()
581 SDValue RHS = N->getOperand(1); in SelectADD_SUB_I64()
585 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32); in SelectADD_SUB_I64()
586 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32); in SelectADD_SUB_I64()
599 SDValue AddLoArgs[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) }; in SelectADD_SUB_I64()
605 SDValue Carry(AddLo, 1); in SelectADD_SUB_I64()
608 SDValue(Hi0, 0), SDValue(Hi1, 0), Carry); in SelectADD_SUB_I64()
610 SDValue Args[5] = { in SelectADD_SUB_I64()
612 SDValue(AddLo,0), in SelectADD_SUB_I64()
614 SDValue(AddHi,0), in SelectADD_SUB_I64()
633 SDValue Ops[8]; in SelectDIV_SCALE()
641 bool AMDGPUDAGToDAGISel::isDSOffsetLegal(const SDValue &Base, unsigned Offset, in isDSOffsetLegal()
656 bool AMDGPUDAGToDAGISel::SelectDS1Addr1Offset(SDValue Addr, SDValue &Base, in SelectDS1Addr1Offset()
657 SDValue &Offset) const { in SelectDS1Addr1Offset()
660 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset()
661 SDValue N1 = Addr.getOperand(1); in SelectDS1Addr1Offset()
674 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS1Addr1Offset()
679 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32, in SelectDS1Addr1Offset()
687 Base = SDValue(MachineSub, 0); in SelectDS1Addr1Offset()
702 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS1Addr1Offset()
705 Base = SDValue(MovZero, 0); in SelectDS1Addr1Offset()
718 bool AMDGPUDAGToDAGISel::SelectDS64Bit4ByteAligned(SDValue Addr, SDValue &Base, in SelectDS64Bit4ByteAligned()
719 SDValue &Offset0, in SelectDS64Bit4ByteAligned()
720 SDValue &Offset1) const { in SelectDS64Bit4ByteAligned()
724 SDValue N0 = Addr.getOperand(0); in SelectDS64Bit4ByteAligned()
725 SDValue N1 = Addr.getOperand(1); in SelectDS64Bit4ByteAligned()
744 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS64Bit4ByteAligned()
749 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32, in SelectDS64Bit4ByteAligned()
757 Base = SDValue(MachineSub, 0); in SelectDS64Bit4ByteAligned()
770 SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i32); in SelectDS64Bit4ByteAligned()
774 Base = SDValue(MovZero, 0); in SelectDS64Bit4ByteAligned()
792 bool AMDGPUDAGToDAGISel::SelectMUBUF(SDValue Addr, SDValue &Ptr, in SelectMUBUF()
793 SDValue &VAddr, SDValue &SOffset, in SelectMUBUF()
794 SDValue &Offset, SDValue &Offen, in SelectMUBUF()
795 SDValue &Idxen, SDValue &Addr64, in SelectMUBUF()
796 SDValue &GLC, SDValue &SLC, in SelectMUBUF()
797 SDValue &TFE) const { in SelectMUBUF()
816 SDValue N0 = Addr.getOperand(0); in SelectMUBUF()
817 SDValue N1 = Addr.getOperand(1); in SelectMUBUF()
822 SDValue N2 = N0.getOperand(0); in SelectMUBUF()
823 SDValue N3 = N0.getOperand(1); in SelectMUBUF()
842 SOffset = SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, DL, MVT::i32, in SelectMUBUF()
851 SDValue N0 = Addr.getOperand(0); in SelectMUBUF()
852 SDValue N1 = Addr.getOperand(1); in SelectMUBUF()
868 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, in SelectMUBUFAddr64()
869 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
870 SDValue &Offset, SDValue &GLC, in SelectMUBUFAddr64()
871 SDValue &SLC, SDValue &TFE) const { in SelectMUBUFAddr64()
872 SDValue Ptr, Offen, Idxen, Addr64; in SelectMUBUFAddr64()
889 SRsrc = SDValue(Lowering.wrapAddr64Rsrc(*CurDAG, DL, Ptr), 0); in SelectMUBUFAddr64()
896 bool AMDGPUDAGToDAGISel::SelectMUBUFAddr64(SDValue Addr, SDValue &SRsrc, in SelectMUBUFAddr64()
897 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFAddr64()
898 SDValue &Offset, in SelectMUBUFAddr64()
899 SDValue &SLC) const { in SelectMUBUFAddr64()
901 SDValue GLC, TFE; in SelectMUBUFAddr64()
906 bool AMDGPUDAGToDAGISel::SelectMUBUFScratch(SDValue Addr, SDValue &Rsrc, in SelectMUBUFScratch()
907 SDValue &VAddr, SDValue &SOffset, in SelectMUBUFScratch()
908 SDValue &ImmOffset) const { in SelectMUBUFScratch()
919 SDValue N0 = Addr.getOperand(0); in SelectMUBUFScratch()
920 SDValue N1 = Addr.getOperand(1); in SelectMUBUFScratch()
937 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset()
938 SDValue &SOffset, SDValue &Offset, in SelectMUBUFOffset()
939 SDValue &GLC, SDValue &SLC, in SelectMUBUFOffset()
940 SDValue &TFE) const { in SelectMUBUFOffset()
941 SDValue Ptr, VAddr, Offen, Idxen, Addr64; in SelectMUBUFOffset()
959 SRsrc = SDValue(Lowering.buildRSRC(*CurDAG, DL, Ptr, 0, Rsrc), 0); in SelectMUBUFOffset()
965 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset()
966 SDValue &Soffset, SDValue &Offset in SelectMUBUFOffset()
968 SDValue GLC, SLC, TFE; in SelectMUBUFOffset()
972 bool AMDGPUDAGToDAGISel::SelectMUBUFOffset(SDValue Addr, SDValue &SRsrc, in SelectMUBUFOffset()
973 SDValue &Soffset, SDValue &Offset, in SelectMUBUFOffset()
974 SDValue &SLC) const { in SelectMUBUFOffset()
975 SDValue GLC, TFE; in SelectMUBUFOffset()
980 bool AMDGPUDAGToDAGISel::SelectMUBUFConstant(SDValue Constant, in SelectMUBUFConstant()
981 SDValue &SOffset, in SelectMUBUFConstant()
982 SDValue &ImmOffset) const { in SelectMUBUFConstant()
1017 SOffset = SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, DL, MVT::i32, in SelectMUBUFConstant()
1024 bool AMDGPUDAGToDAGISel::SelectMUBUFIntrinsicOffset(SDValue Offset, in SelectMUBUFIntrinsicOffset()
1025 SDValue &SOffset, in SelectMUBUFIntrinsicOffset()
1026 SDValue &ImmOffset) const { in SelectMUBUFIntrinsicOffset()
1035 bool AMDGPUDAGToDAGISel::SelectMUBUFIntrinsicVOffset(SDValue Offset, in SelectMUBUFIntrinsicVOffset()
1036 SDValue &SOffset, in SelectMUBUFIntrinsicVOffset()
1037 SDValue &ImmOffset, in SelectMUBUFIntrinsicVOffset()
1038 SDValue &VOffset) const { in SelectMUBUFIntrinsicVOffset()
1043 SDValue Tmp1, Tmp2; in SelectMUBUFIntrinsicVOffset()
1053 SDValue N0 = Offset.getOperand(0); in SelectMUBUFIntrinsicVOffset()
1054 SDValue N1 = Offset.getOperand(1); in SelectMUBUFIntrinsicVOffset()
1069 bool AMDGPUDAGToDAGISel::SelectFlat(SDValue Addr, in SelectFlat()
1070 SDValue &VAddr, in SelectFlat()
1071 SDValue &SLC, in SelectFlat()
1072 SDValue &TFE) const { in SelectFlat()
1088 bool AMDGPUDAGToDAGISel::SelectSMRDOffset(SDValue ByteOffsetNode, in SelectSMRDOffset()
1089 SDValue &Offset, bool &Imm) const { in SelectSMRDOffset()
1115 SDValue C32Bit = CurDAG->getTargetConstant(ByteOffset, SL, MVT::i32); in SelectSMRDOffset()
1116 Offset = SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, in SelectSMRDOffset()
1123 bool AMDGPUDAGToDAGISel::SelectSMRD(SDValue Addr, SDValue &SBase, in SelectSMRD()
1124 SDValue &Offset, bool &Imm) const { in SelectSMRD()
1128 SDValue N0 = Addr.getOperand(0); in SelectSMRD()
1129 SDValue N1 = Addr.getOperand(1); in SelectSMRD()
1142 bool AMDGPUDAGToDAGISel::SelectSMRDImm(SDValue Addr, SDValue &SBase, in SelectSMRDImm()
1143 SDValue &Offset) const { in SelectSMRDImm()
1148 bool AMDGPUDAGToDAGISel::SelectSMRDImm32(SDValue Addr, SDValue &SBase, in SelectSMRDImm32()
1149 SDValue &Offset) const { in SelectSMRDImm32()
1161 bool AMDGPUDAGToDAGISel::SelectSMRDSgpr(SDValue Addr, SDValue &SBase, in SelectSMRDSgpr()
1162 SDValue &Offset) const { in SelectSMRDSgpr()
1168 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm(SDValue Addr, in SelectSMRDBufferImm()
1169 SDValue &Offset) const { in SelectSMRDBufferImm()
1174 bool AMDGPUDAGToDAGISel::SelectSMRDBufferImm32(SDValue Addr, in SelectSMRDBufferImm32()
1175 SDValue &Offset) const { in SelectSMRDBufferImm32()
1186 bool AMDGPUDAGToDAGISel::SelectSMRDBufferSgpr(SDValue Addr, in SelectSMRDBufferSgpr()
1187 SDValue &Offset) const { in SelectSMRDBufferSgpr()
1193 bool AMDGPUDAGToDAGISel::SelectMOVRELOffset(SDValue Index, in SelectMOVRELOffset()
1194 SDValue &Base, in SelectMOVRELOffset()
1195 SDValue &Offset) const { in SelectMOVRELOffset()
1199 SDValue N0 = Index.getOperand(0); in SelectMOVRELOffset()
1200 SDValue N1 = Index.getOperand(1); in SelectMOVRELOffset()
1218 SDValue Val, uint32_t Offset, in getS_BFE()
1224 SDValue PackedConst = CurDAG->getTargetConstant(PackedVal, DL, MVT::i32); in getS_BFE()
1234 const SDValue &Shl = N->getOperand(0); in SelectS_BFEFromShifts()
1260 const SDValue &Srl = N->getOperand(0); in SelectS_BFE()
1282 const SDValue &And = N->getOperand(0); in SelectS_BFE()
1312 SDValue Src = N->getOperand(0); in SelectS_BFE()
1331 SDValue Cond = N->getOperand(1); in SelectBRCOND()
1351 SDValue VCC = CurDAG->getCopyToReg(N->getOperand(0), SL, AMDGPU::VCC, in SelectBRCOND()
1352 SDValue(MaskedCond, 0), in SelectBRCOND()
1353 SDValue()); // Passing SDValue() adds a in SelectBRCOND()
1378 SDValue SRsrc, VAddr, SOffset, Offset, GLC, SLC; in SelectATOMIC_CMP_SWAP()
1383 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP()
1387 SDValue Ops[] = { in SelectATOMIC_CMP_SWAP()
1396 SDValue SRsrc, SOffset, Offset, SLC; in SelectATOMIC_CMP_SWAP()
1401 SDValue CmpVal = Mem->getOperand(2); in SelectATOMIC_CMP_SWAP()
1402 SDValue Ops[] = { in SelectATOMIC_CMP_SWAP()
1420 SDValue Extract in SelectATOMIC_CMP_SWAP()
1421 = CurDAG->getTargetExtractSubreg(SubReg, SL, VT, SDValue(CmpSwap, 0)); in SelectATOMIC_CMP_SWAP()
1423 ReplaceUses(SDValue(N, 0), Extract); in SelectATOMIC_CMP_SWAP()
1424 ReplaceUses(SDValue(N, 1), SDValue(CmpSwap, 1)); in SelectATOMIC_CMP_SWAP()
1428 bool AMDGPUDAGToDAGISel::SelectVOP3Mods(SDValue In, SDValue &Src, in SelectVOP3Mods()
1429 SDValue &SrcMods) const { in SelectVOP3Mods()
1450 bool AMDGPUDAGToDAGISel::SelectVOP3NoMods(SDValue In, SDValue &Src, in SelectVOP3NoMods()
1451 SDValue &SrcMods) const { in SelectVOP3NoMods()
1456 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0(SDValue In, SDValue &Src, in SelectVOP3Mods0()
1457 SDValue &SrcMods, SDValue &Clamp, in SelectVOP3Mods0()
1458 SDValue &Omod) const { in SelectVOP3Mods0()
1467 bool AMDGPUDAGToDAGISel::SelectVOP3NoMods0(SDValue In, SDValue &Src, in SelectVOP3NoMods0()
1468 SDValue &SrcMods, SDValue &Clamp, in SelectVOP3NoMods0()
1469 SDValue &Omod) const { in SelectVOP3NoMods0()
1477 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0Clamp(SDValue In, SDValue &Src, in SelectVOP3Mods0Clamp()
1478 SDValue &SrcMods, in SelectVOP3Mods0Clamp()
1479 SDValue &Omod) const { in SelectVOP3Mods0Clamp()
1486 bool AMDGPUDAGToDAGISel::SelectVOP3Mods0Clamp0OMod(SDValue In, SDValue &Src, in SelectVOP3Mods0Clamp0OMod()
1487 SDValue &SrcMods, in SelectVOP3Mods0Clamp0OMod()
1488 SDValue &Clamp, in SelectVOP3Mods0Clamp0OMod()
1489 SDValue &Omod) const { in SelectVOP3Mods0Clamp0OMod()
1503 SDValue FI = CurDAG->getTargetFrameIndex(I, MVT::i32); in PreprocessISelDAG()
1511 SDValue EffectiveFI = FI; in PreprocessISelDAG()
1514 EffectiveFI = SDValue(*It, 0); in PreprocessISelDAG()
1530 SDValue NewOps[8]; in PreprocessISelDAG()
1541 NewOps[Op] = SDValue(Mov, 0); in PreprocessISelDAG()