Lines Matching refs:LdSt
205 bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg, in getMemOpBaseRegImmOfs() argument
208 unsigned Opc = LdSt.getOpcode(); in getMemOpBaseRegImmOfs()
210 if (isDS(LdSt)) { in getMemOpBaseRegImmOfs()
212 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs()
216 getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs()
227 getNamedOperand(LdSt, AMDGPU::OpName::offset0); in getMemOpBaseRegImmOfs()
229 getNamedOperand(LdSt, AMDGPU::OpName::offset1); in getMemOpBaseRegImmOfs()
239 if (LdSt.mayLoad()) in getMemOpBaseRegImmOfs()
240 EltSize = getOpRegClass(LdSt, 0)->getSize() / 2; in getMemOpBaseRegImmOfs()
242 assert(LdSt.mayStore()); in getMemOpBaseRegImmOfs()
244 EltSize = getOpRegClass(LdSt, Data0Idx)->getSize(); in getMemOpBaseRegImmOfs()
251 getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs()
260 if (isMUBUF(LdSt) || isMTBUF(LdSt)) { in getMemOpBaseRegImmOfs()
265 getNamedOperand(LdSt, AMDGPU::OpName::vaddr); in getMemOpBaseRegImmOfs()
270 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs()
276 if (isSMRD(LdSt)) { in getMemOpBaseRegImmOfs()
278 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs()
283 getNamedOperand(LdSt, AMDGPU::OpName::sbase); in getMemOpBaseRegImmOfs()
289 if (isFLAT(LdSt)) { in getMemOpBaseRegImmOfs()
290 const MachineOperand *AddrReg = getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs()