Lines Matching refs:dl
1447 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult() argument
1475 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
1480 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
1486 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
1489 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
1490 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
1491 DAG.getConstant(0, dl, MVT::i32)); in LowerCallResult()
1494 Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); in LowerCallResult()
1498 Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); in LowerCallResult()
1503 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
1504 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
1505 DAG.getConstant(1, dl, MVT::i32)); in LowerCallResult()
1508 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), in LowerCallResult()
1518 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
1530 SDValue Arg, const SDLoc &dl, in LowerMemOpCallTo() argument
1535 SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset, dl); in LowerMemOpCallTo()
1536 PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(DAG.getDataLayout()), in LowerMemOpCallTo()
1539 Chain, dl, Arg, PtrOff, in LowerMemOpCallTo()
1544 void ARMTargetLowering::PassF64ArgInRegs(const SDLoc &dl, SelectionDAG &DAG, in PassF64ArgInRegs() argument
1552 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in PassF64ArgInRegs()
1562 StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, in PassF64ArgInRegs()
1566 dl, DAG, NextVA, in PassF64ArgInRegs()
1578 SDLoc &dl = CLI.DL; in LowerCall() local
1634 DAG.getIntPtrConstant(NumBytes, dl, true), dl); in LowerCall()
1637 DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy(DAG.getDataLayout())); in LowerCall()
1657 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1660 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1663 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1666 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
1673 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
1674 DAG.getConstant(0, dl, MVT::i32)); in LowerCall()
1675 SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
1676 DAG.getConstant(1, dl, MVT::i32)); in LowerCall()
1678 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, in LowerCall()
1683 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, in LowerCall()
1689 dl, DAG, VA, Flags)); in LowerCall()
1692 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], in LowerCall()
1722 SDValue Const = DAG.getConstant(4*i, dl, MVT::i32); in LowerCall()
1723 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); in LowerCall()
1724 SDValue Load = DAG.getLoad(PtrVT, dl, Chain, AddArg, in LowerCall()
1742 SDValue StkPtrOff = DAG.getIntPtrConstant(LocMemOffset, dl); in LowerCall()
1743 SDValue Dst = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, StkPtrOff); in LowerCall()
1744 SDValue SrcOffset = DAG.getIntPtrConstant(4*offset, dl); in LowerCall()
1745 SDValue Src = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, SrcOffset); in LowerCall()
1746 SDValue SizeNode = DAG.getConstant(Flags.getByValSize() - 4*offset, dl, in LowerCall()
1748 SDValue AlignNode = DAG.getConstant(Flags.getByValAlign(), dl, in LowerCall()
1753 MemOpChains.push_back(DAG.getNode(ARMISD::COPY_STRUCT_BYVAL, dl, VTs, in LowerCall()
1760 dl, DAG, VA, Flags)); in LowerCall()
1765 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCall()
1774 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
1791 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
1830 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1832 PtrVt, dl, DAG.getEntryNode(), CPAddr, in LowerCall()
1845 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1847 PtrVt, dl, DAG.getEntryNode(), CPAddr, in LowerCall()
1861 ARMISD::WrapperPIC, dl, PtrVt, in LowerCall()
1862 DAG.getTargetGlobalAddress(GV, dl, PtrVt, 0, ARMII::MO_NONLAZY)); in LowerCall()
1863 Callee = DAG.getLoad(PtrVt, dl, DAG.getEntryNode(), Callee, in LowerCall()
1873 DAG.getTargetGlobalAddress(GV, dl, PtrVt, /*Offset=*/0, TargetFlags); in LowerCall()
1876 DAG.getLoad(PtrVt, dl, DAG.getEntryNode(), in LowerCall()
1877 DAG.getNode(ARMISD::Wrapper, dl, PtrVt, Callee), in LowerCall()
1881 Callee = DAG.getTargetGlobalAddress(GV, dl, PtrVt, 0, 0); in LowerCall()
1893 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1895 PtrVt, dl, DAG.getEntryNode(), CPAddr, in LowerCall()
1898 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerCall()
1899 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVt, Callee, PICLabel); in LowerCall()
1961 return DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops); in LowerCall()
1965 Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops); in LowerCall()
1968 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, dl, true), in LowerCall()
1969 DAG.getIntPtrConstant(0, dl, true), InFlag, dl); in LowerCall()
1975 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, DAG, in LowerCall()
2261 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
2296 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
2303 SDValue Half = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
2304 DAG.getConstant(0, dl, MVT::i32)); in LowerReturn()
2305 SDValue HalfGPRs = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
2308 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
2314 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
2322 Arg = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
2323 DAG.getConstant(1, dl, MVT::i32)); in LowerReturn()
2327 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
2329 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
2335 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
2339 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag); in LowerReturn()
2375 return LowerInterruptReturn(RetOps, dl, DAG); in LowerReturn()
2378 return DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other, RetOps); in LowerReturn()
2495 SDLoc dl(Op); in LowerConstantPool() local
2504 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res); in LowerConstantPool()
2671 SDLoc dl(GA); in LowerToTLSGeneralDynamicModel() local
2681 Argument = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Argument); in LowerToTLSGeneralDynamicModel()
2683 DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Argument, in LowerToTLSGeneralDynamicModel()
2688 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerToTLSGeneralDynamicModel()
2689 Argument = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Argument, PICLabel); in LowerToTLSGeneralDynamicModel()
2700 CLI.setDebugLoc(dl).setChain(Chain) in LowerToTLSGeneralDynamicModel()
2715 SDLoc dl(GA); in LowerToTLSExecModels() local
2720 SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerToTLSExecModels()
2733 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
2735 PtrVT, dl, Chain, Offset, in LowerToTLSExecModels()
2740 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerToTLSExecModels()
2741 Offset = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Offset, PICLabel); in LowerToTLSExecModels()
2744 PtrVT, dl, Chain, Offset, in LowerToTLSExecModels()
2753 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
2755 PtrVT, dl, Chain, Offset, in LowerToTLSExecModels()
2762 return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); in LowerToTLSExecModels()
2795 SDLoc dl(Op); in LowerGlobalAddressELF() local
2805 SDLoc dl(Op); in LowerGlobalAddressELF() local
2812 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
2814 PtrVT, dl, DAG.getEntryNode(), CPAddr, in LowerGlobalAddressELF()
2818 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerGlobalAddressELF()
2819 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerGlobalAddressELF()
2821 Result = DAG.getLoad(PtrVT, dl, Chain, Result, in LowerGlobalAddressELF()
2833 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressELF()
2834 DAG.getTargetGlobalAddress(GV, dl, PtrVT)); in LowerGlobalAddressELF()
2837 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
2839 PtrVT, dl, DAG.getEntryNode(), CPAddr, in LowerGlobalAddressELF()
2848 SDLoc dl(Op); in LowerGlobalAddressDarwin() local
2859 SDValue G = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, ARMII::MO_NONLAZY); in LowerGlobalAddressDarwin()
2860 SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, G); in LowerGlobalAddressDarwin()
2863 Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Result, in LowerGlobalAddressDarwin()
2898 SDLoc dl(Op); in LowerEH_SJLJ_SETJMP() local
2899 SDValue Val = DAG.getConstant(0, dl, MVT::i32); in LowerEH_SJLJ_SETJMP()
2900 return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, in LowerEH_SJLJ_SETJMP()
2907 SDLoc dl(Op); in LowerEH_SJLJ_LONGJMP() local
2908 return DAG.getNode(ARMISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0), in LowerEH_SJLJ_LONGJMP()
2909 Op.getOperand(1), DAG.getConstant(0, dl, MVT::i32)); in LowerEH_SJLJ_LONGJMP()
2914 SDLoc dl(Op); in LowerEH_SJLJ_SETUP_DISPATCH() local
2915 return DAG.getNode(ARMISD::EH_SJLJ_SETUP_DISPATCH, dl, MVT::Other, in LowerEH_SJLJ_SETUP_DISPATCH()
2923 SDLoc dl(Op); in LowerINTRINSIC_WO_CHAIN() local
2929 return DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
2933 return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerINTRINSIC_WO_CHAIN()
2947 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerINTRINSIC_WO_CHAIN()
2949 PtrVT, dl, DAG.getEntryNode(), CPAddr, in LowerINTRINSIC_WO_CHAIN()
2954 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerINTRINSIC_WO_CHAIN()
2955 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerINTRINSIC_WO_CHAIN()
3002 SDLoc dl(Op); in LowerATOMIC_FENCE() local
3009 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
3010 DAG.getConstant(0, dl, MVT::i32)); in LowerATOMIC_FENCE()
3027 return DAG.getNode(ISD::INTRINSIC_VOID, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
3028 DAG.getConstant(Intrinsic::arm_dmb, dl, MVT::i32), in LowerATOMIC_FENCE()
3029 DAG.getConstant(Domain, dl, MVT::i32)); in LowerATOMIC_FENCE()
3040 SDLoc dl(Op); in LowerPREFETCH() local
3054 return DAG.getNode(ARMISD::PRELOAD, dl, MVT::Other, Op.getOperand(0), in LowerPREFETCH()
3055 Op.getOperand(1), DAG.getConstant(isRead, dl, MVT::i32), in LowerPREFETCH()
3056 DAG.getConstant(isData, dl, MVT::i32)); in LowerPREFETCH()
3065 SDLoc dl(Op); in LowerVASTART() local
3069 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1), in LowerVASTART()
3077 const SDLoc &dl) const { in GetF64FormalArgument()
3089 SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); in GetF64FormalArgument()
3099 MVT::i32, dl, Root, FIN, in GetF64FormalArgument()
3104 ArgValue2 = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); in GetF64FormalArgument()
3108 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
3120 const SDLoc &dl, SDValue &Chain, in StoreByValRegs() argument
3160 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); in StoreByValRegs()
3162 DAG.getStore(Val.getValue(1), dl, Val, FIN, in StoreByValRegs()
3165 FIN = DAG.getNode(ISD::ADD, dl, PtrVT, FIN, DAG.getConstant(4, dl, PtrVT)); in StoreByValRegs()
3169 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in StoreByValRegs()
3175 const SDLoc &dl, SDValue &Chain, in VarArgStyleRegisters() argument
3187 int FrameIndex = StoreByValRegs(CCInfo, DAG, dl, Chain, nullptr, in VarArgStyleRegisters()
3195 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
3272 Chain, DAG, dl); in LowerFormalArguments()
3279 MVT::f64, dl, Chain, FIN, in LowerFormalArguments()
3284 Chain, DAG, dl); in LowerFormalArguments()
3286 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
3287 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
3289 DAG.getIntPtrConstant(0, dl)); in LowerFormalArguments()
3290 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
3292 DAG.getIntPtrConstant(1, dl)); in LowerFormalArguments()
3294 ArgValue = GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl); in LowerFormalArguments()
3313 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments()
3323 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3326 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
3328 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3331 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
3333 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3363 CCInfo, DAG, dl, Chain, &*CurOrigArg, CurByValIndex, in LowerFormalArguments()
3375 VA.getValVT(), dl, Chain, FIN, in LowerFormalArguments()
3386 VarArgStyleRegisters(CCInfo, DAG, dl, Chain, in LowerFormalArguments()
3423 const SDLoc &dl) const { in getARMCmp()
3434 RHS = DAG.getConstant(C - 1, dl, MVT::i32); in getARMCmp()
3441 RHS = DAG.getConstant(C - 1, dl, MVT::i32); in getARMCmp()
3448 RHS = DAG.getConstant(C + 1, dl, MVT::i32); in getARMCmp()
3455 RHS = DAG.getConstant(C + 1, dl, MVT::i32); in getARMCmp()
3474 ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in getARMCmp()
3475 return DAG.getNode(CompareType, dl, MVT::Glue, LHS, RHS); in getARMCmp()
3480 SelectionDAG &DAG, const SDLoc &dl) const { in getVFPCmp()
3484 Cmp = DAG.getNode(ARMISD::CMPFP, dl, MVT::Glue, LHS, RHS); in getVFPCmp()
3486 Cmp = DAG.getNode(ARMISD::CMPFPw0, dl, MVT::Glue, LHS); in getVFPCmp()
3487 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp()
3519 SDLoc dl(Op); in getARMXALUOOp() local
3530 ARMcc = DAG.getConstant(ARMCC::VC, dl, MVT::i32); in getARMXALUOOp()
3531 Value = DAG.getNode(ISD::ADD, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
3532 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
3535 ARMcc = DAG.getConstant(ARMCC::HS, dl, MVT::i32); in getARMXALUOOp()
3536 Value = DAG.getNode(ISD::ADD, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
3537 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
3540 ARMcc = DAG.getConstant(ARMCC::VC, dl, MVT::i32); in getARMXALUOOp()
3541 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
3542 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
3545 ARMcc = DAG.getConstant(ARMCC::HS, dl, MVT::i32); in getARMXALUOOp()
3546 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
3547 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
3565 SDLoc dl(Op); in LowerXALUO() local
3567 SDValue TVal = DAG.getConstant(1, dl, MVT::i32); in LowerXALUO()
3568 SDValue FVal = DAG.getConstant(0, dl, MVT::i32); in LowerXALUO()
3571 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal, in LowerXALUO()
3575 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerXALUO()
3583 SDLoc dl(Op); in LowerSELECT() local
3598 return getCMOV(dl, VT, SelectTrue, SelectFalse, ARMcc, CCR, in LowerSELECT()
3633 return getCMOV(dl, VT, True, False, ARMcc, CCR, Cmp, DAG); in LowerSELECT()
3640 Cond = DAG.getNode(ISD::AND, dl, Cond.getValueType(), Cond, in LowerSELECT()
3641 DAG.getConstant(1, dl, Cond.getValueType())); in LowerSELECT()
3643 return DAG.getSelectCC(dl, Cond, in LowerSELECT()
3644 DAG.getConstant(0, dl, Cond.getValueType()), in LowerSELECT()
3697 SDValue ARMTargetLowering::getCMOV(const SDLoc &dl, EVT VT, SDValue FalseVal, in getCMOV() argument
3701 FalseVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
3703 TrueVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
3711 SDValue Low = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseLow, TrueLow, in getCMOV()
3713 SDValue High = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseHigh, TrueHigh, in getCMOV()
3716 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Low, High); in getCMOV()
3718 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR, in getCMOV()
3852 SDLoc dl(Op); in LowerSELECT_CC() local
3858 return DAG.getNode(ARMISD::SSAT, dl, VT, SatValue, in LowerSELECT_CC()
3859 DAG.getConstant(countTrailingOnes(SatConstant), dl, VT)); in LowerSELECT_CC()
3869 dl); in LowerSELECT_CC()
3874 RHS = DAG.getConstant(0, dl, LHS.getValueType()); in LowerSELECT_CC()
3902 SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMcc, DAG, dl); in LowerSELECT_CC()
3903 return getCMOV(dl, VT, FalseVal, TrueVal, ARMcc, CCR, Cmp, DAG); in LowerSELECT_CC()
3925 SDValue ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in LowerSELECT_CC()
3926 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl); in LowerSELECT_CC()
3928 SDValue Result = getCMOV(dl, VT, FalseVal, TrueVal, ARMcc, CCR, Cmp, DAG); in LowerSELECT_CC()
3930 SDValue ARMcc2 = DAG.getConstant(CondCode2, dl, MVT::i32); in LowerSELECT_CC()
3932 SDValue Cmp2 = getVFPCmp(LHS, RHS, DAG, dl); in LowerSELECT_CC()
3933 Result = getCMOV(dl, VT, Result, TrueVal, ARMcc2, CCR, Cmp2, DAG); in LowerSELECT_CC()
3976 SDLoc dl(Op); in expandf64Toi32() local
3979 RetVal1 = DAG.getConstant(0, dl, MVT::i32); in expandf64Toi32()
3980 RetVal2 = DAG.getConstant(0, dl, MVT::i32); in expandf64Toi32()
3986 RetVal1 = DAG.getLoad(MVT::i32, dl, in expandf64Toi32()
3994 SDValue NewPtr = DAG.getNode(ISD::ADD, dl, in expandf64Toi32()
3995 PtrType, Ptr, DAG.getConstant(4, dl, PtrType)); in expandf64Toi32()
3996 RetVal2 = DAG.getLoad(MVT::i32, dl, in expandf64Toi32()
4016 SDLoc dl(Op); in OptimizeVFPBrcond() local
4031 SDValue Mask = DAG.getConstant(0x7fffffff, dl, MVT::i32); in OptimizeVFPBrcond()
4034 LHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
4036 RHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
4038 SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMcc, DAG, dl); in OptimizeVFPBrcond()
4040 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
4048 LHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, LHS2, Mask); in OptimizeVFPBrcond()
4049 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
4051 ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in OptimizeVFPBrcond()
4054 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops); in OptimizeVFPBrcond()
4066 SDLoc dl(Op); in LowerBR_CC() local
4070 dl); in LowerBR_CC()
4075 RHS = DAG.getConstant(0, dl, LHS.getValueType()); in LowerBR_CC()
4082 SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMcc, DAG, dl); in LowerBR_CC()
4084 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
4100 SDValue ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in LowerBR_CC()
4101 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl); in LowerBR_CC()
4105 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
4107 ARMcc = DAG.getConstant(CondCode2, dl, MVT::i32); in LowerBR_CC()
4109 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
4118 SDLoc dl(Op); in LowerBR_JT() local
4123 Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI); in LowerBR_JT()
4124 Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, dl, PTy)); in LowerBR_JT()
4125 SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Index, Table); in LowerBR_JT()
4131 return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain, in LowerBR_JT()
4136 DAG.getLoad((EVT)MVT::i32, dl, Chain, Addr, in LowerBR_JT()
4140 Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr, Table); in LowerBR_JT()
4141 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
4144 DAG.getLoad(PTy, dl, Chain, Addr, in LowerBR_JT()
4148 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
4154 SDLoc dl(Op); in LowerVectorFP_TO_INT() local
4167 Op = DAG.getNode(Op.getOpcode(), dl, MVT::v4i32, Op.getOperand(0)); in LowerVectorFP_TO_INT()
4168 return DAG.getNode(ISD::TRUNCATE, dl, VT, Op); in LowerVectorFP_TO_INT()
4192 SDLoc dl(Op); in LowerVectorINT_TO_FP() local
4219 Op = DAG.getNode(CastOpc, dl, MVT::v4i32, Op.getOperand(0)); in LowerVectorINT_TO_FP()
4220 return DAG.getNode(Opc, dl, VT, Op); in LowerVectorINT_TO_FP()
4246 SDLoc dl(Op); in LowerFCOPYSIGN() local
4256 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, in LowerFCOPYSIGN()
4257 DAG.getTargetConstant(EncodedVal, dl, MVT::i32)); in LowerFCOPYSIGN()
4260 Mask = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
4261 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
4262 DAG.getConstant(32, dl, MVT::i32)); in LowerFCOPYSIGN()
4264 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
4266 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
4268 Tmp1 = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
4269 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
4270 DAG.getConstant(32, dl, MVT::i32)); in LowerFCOPYSIGN()
4272 Tmp1 = DAG.getNode(ARMISD::VSHRu, dl, MVT::v1i64, in LowerFCOPYSIGN()
4273 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
4274 DAG.getConstant(32, dl, MVT::i32)); in LowerFCOPYSIGN()
4275 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
4276 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
4279 dl, MVT::i32); in LowerFCOPYSIGN()
4280 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
4281 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
4282 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
4284 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
4285 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
4286 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
4288 Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res); in LowerFCOPYSIGN()
4289 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, in LowerFCOPYSIGN()
4290 DAG.getConstant(0, dl, MVT::i32)); in LowerFCOPYSIGN()
4292 Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res); in LowerFCOPYSIGN()
4300 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
4302 Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); in LowerFCOPYSIGN()
4305 SDValue Mask1 = DAG.getConstant(0x80000000, dl, MVT::i32); in LowerFCOPYSIGN()
4306 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN()
4307 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
4309 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
4310 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
4311 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, in LowerFCOPYSIGN()
4312 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
4316 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
4319 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
4320 Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); in LowerFCOPYSIGN()
4321 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerFCOPYSIGN()
4333 SDLoc dl(Op); in LowerRETURNADDR() local
4337 SDValue Offset = DAG.getConstant(4, dl, MVT::i32); in LowerRETURNADDR()
4338 return DAG.getLoad(VT, dl, DAG.getEntryNode(), in LowerRETURNADDR()
4339 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), in LowerRETURNADDR()
4345 return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT); in LowerRETURNADDR()
4356 SDLoc dl(Op); // FIXME probably not meaningful in LowerFRAMEADDR() local
4359 SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg, VT); in LowerFRAMEADDR()
4361 FrameAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), FrameAddr, in LowerFRAMEADDR()
4440 SDLoc dl(Op); in CombineVMOVDRRCandidateWithVecOp() local
4445 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
4446 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DstVT, BitCast, in CombineVMOVDRRCandidateWithVecOp()
4447 DAG.getConstant(NewIndex.getZExtValue(), dl, MVT::i32)); in CombineVMOVDRRCandidateWithVecOp()
4457 SDLoc dl(N); in ExpandBITCAST() local
4474 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
4475 DAG.getConstant(0, dl, MVT::i32)); in ExpandBITCAST()
4476 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
4477 DAG.getConstant(1, dl, MVT::i32)); in ExpandBITCAST()
4478 return DAG.getNode(ISD::BITCAST, dl, DstVT, in ExpandBITCAST()
4479 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); in ExpandBITCAST()
4487 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
4489 DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op)); in ExpandBITCAST()
4491 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
4494 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
4506 static SDValue getZeroVector(EVT VT, SelectionDAG &DAG, const SDLoc &dl) { in getZeroVector() argument
4509 SDValue EncodedVal = DAG.getTargetConstant(0, dl, MVT::i32); in getZeroVector()
4511 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector()
4512 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
4522 SDLoc dl(Op); in LowerShiftRightParts() local
4531 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftRightParts()
4532 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftRightParts()
4533 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
4534 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
4535 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftRightParts()
4536 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts()
4537 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
4538 SDValue TrueVal = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); in LowerShiftRightParts()
4541 SDValue Cmp = getARMCmp(ExtraShAmt, DAG.getConstant(0, dl, MVT::i32), in LowerShiftRightParts()
4542 ISD::SETGE, ARMcc, DAG, dl); in LowerShiftRightParts()
4543 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
4544 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, in LowerShiftRightParts()
4548 return DAG.getMergeValues(Ops, dl); in LowerShiftRightParts()
4558 SDLoc dl(Op); in LowerShiftLeftParts() local
4565 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftLeftParts()
4566 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftLeftParts()
4567 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts()
4568 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
4569 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftLeftParts()
4570 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
4571 SDValue Tmp3 = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); in LowerShiftLeftParts()
4573 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
4575 SDValue Cmp = getARMCmp(ExtraShAmt, DAG.getConstant(0, dl, MVT::i32), in LowerShiftLeftParts()
4576 ISD::SETGE, ARMcc, DAG, dl); in LowerShiftLeftParts()
4577 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
4578 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, Tmp3, ARMcc, in LowerShiftLeftParts()
4582 return DAG.getMergeValues(Ops, dl); in LowerShiftLeftParts()
4591 SDLoc dl(Op); in LowerFLT_ROUNDS_() local
4592 SDValue FPSCR = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32, in LowerFLT_ROUNDS_()
4593 DAG.getConstant(Intrinsic::arm_get_fpscr, dl, in LowerFLT_ROUNDS_()
4595 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR, in LowerFLT_ROUNDS_()
4596 DAG.getConstant(1U << 22, dl, MVT::i32)); in LowerFLT_ROUNDS_()
4597 SDValue RMODE = DAG.getNode(ISD::SRL, dl, MVT::i32, FltRounds, in LowerFLT_ROUNDS_()
4598 DAG.getConstant(22, dl, MVT::i32)); in LowerFLT_ROUNDS_()
4599 return DAG.getNode(ISD::AND, dl, MVT::i32, RMODE, in LowerFLT_ROUNDS_()
4600 DAG.getConstant(3, dl, MVT::i32)); in LowerFLT_ROUNDS_()
4605 SDLoc dl(N); in LowerCTTZ() local
4612 SDValue NX = DAG.getNode(ISD::SUB, dl, VT, getZeroVector(VT, DAG, dl), X); in LowerCTTZ()
4613 SDValue LSB = DAG.getNode(ISD::AND, dl, VT, X, NX); in LowerCTTZ()
4619 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
4620 DAG.getTargetConstant(1, dl, ElemTy)); in LowerCTTZ()
4621 SDValue Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
4622 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
4630 DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
4631 DAG.getTargetConstant(NumBits - 1, dl, ElemTy)); in LowerCTTZ()
4632 SDValue CTLZ = DAG.getNode(ISD::CTLZ, dl, VT, LSB); in LowerCTTZ()
4633 return DAG.getNode(ISD::SUB, dl, VT, WidthMinus1, CTLZ); in LowerCTTZ()
4646 SDValue FF = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
4647 DAG.getTargetConstant(0x1eff, dl, MVT::i32)); in LowerCTTZ()
4648 Bits = DAG.getNode(ISD::ADD, dl, VT, LSB, FF); in LowerCTTZ()
4650 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
4651 DAG.getTargetConstant(1, dl, ElemTy)); in LowerCTTZ()
4652 Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
4657 SDValue BitsVT8 = DAG.getNode(ISD::BITCAST, dl, VT8Bit, Bits); in LowerCTTZ()
4658 SDValue Cnt8 = DAG.getNode(ISD::CTPOP, dl, VT8Bit, BitsVT8); in LowerCTTZ()
4662 SDValue Cnt16 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT16Bit, in LowerCTTZ()
4663 DAG.getTargetConstant(Intrinsic::arm_neon_vpaddlu, dl, MVT::i32), in LowerCTTZ()
4669 SDValue Cnt32 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT32Bit, in LowerCTTZ()
4670 DAG.getTargetConstant(Intrinsic::arm_neon_vpaddlu, dl, MVT::i32), in LowerCTTZ()
4676 SDValue Cnt64 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerCTTZ()
4677 DAG.getTargetConstant(Intrinsic::arm_neon_vpaddlu, dl, MVT::i32), in LowerCTTZ()
4685 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, VT, N->getOperand(0)); in LowerCTTZ()
4686 return DAG.getNode(ISD::CTLZ, dl, VT, rbit); in LowerCTTZ()
4800 SDLoc dl(N); in LowerShift() local
4810 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerShift()
4811 DAG.getConstant(Intrinsic::arm_neon_vshiftu, dl, in LowerShift()
4822 SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, in LowerShift()
4823 getZeroVector(ShiftVT, DAG, dl), in LowerShift()
4828 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerShift()
4829 DAG.getConstant(vshiftInt, dl, MVT::i32), in LowerShift()
4836 SDLoc dl(N); in Expand64BitShift() local
4853 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
4854 DAG.getConstant(0, dl, MVT::i32)); in Expand64BitShift()
4855 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
4856 DAG.getConstant(1, dl, MVT::i32)); in Expand64BitShift()
4861 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), Hi); in Expand64BitShift()
4864 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
4867 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
4882 SDLoc dl(Op); in LowerVSETCC() local
4915 Op0 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp1, TmpOp0); in LowerVSETCC()
4916 Op1 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
4924 Op0 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp1, TmpOp0); in LowerVSETCC()
4925 Op1 = DAG.getNode(ARMISD::VCGE, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
4959 Op0 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(0)); in LowerVSETCC()
4960 Op1 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(1)); in LowerVSETCC()
4986 Result = DAG.getNode(ARMISD::VCEQZ, dl, CmpVT, SingleOp); break; in LowerVSETCC()
4988 Result = DAG.getNode(ARMISD::VCGEZ, dl, CmpVT, SingleOp); break; in LowerVSETCC()
4990 Result = DAG.getNode(ARMISD::VCLEZ, dl, CmpVT, SingleOp); break; in LowerVSETCC()
4992 Result = DAG.getNode(ARMISD::VCGTZ, dl, CmpVT, SingleOp); break; in LowerVSETCC()
4994 Result = DAG.getNode(ARMISD::VCLTZ, dl, CmpVT, SingleOp); break; in LowerVSETCC()
4996 Result = DAG.getNode(Opc, dl, CmpVT, Op0, Op1); in LowerVSETCC()
4999 Result = DAG.getNode(Opc, dl, CmpVT, Op0, Op1); in LowerVSETCC()
5002 Result = DAG.getSExtOrTrunc(Result, dl, VT); in LowerVSETCC()
5005 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
5039 const SDLoc &dl, EVT &VT, bool is128Bits, in isNEONModifiedImm() argument
5170 return DAG.getTargetConstant(EncodedVal, dl, MVT::i32); in isNEONModifiedImm()
5629 const ARMSubtarget *ST, const SDLoc &dl) { in IsSingleInstrConstant() argument
5637 return DAG.getConstant(Val, dl, MVT::i32); in IsSingleInstrConstant()
5640 return DAG.getConstant(Val, dl, MVT::i32); in IsSingleInstrConstant()
5650 SDLoc dl(Op); in LowerBUILD_VECTOR() local
5662 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
5665 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
5666 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
5673 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
5676 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
5677 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
5684 SDValue Val = DAG.getTargetConstant(ImmVal, dl, MVT::i32); in LowerBUILD_VECTOR()
5685 return DAG.getNode(ARMISD::VMOVFPIMM, dl, VT, Val); in LowerBUILD_VECTOR()
5737 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
5762 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
5763 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT), in LowerBUILD_VECTOR()
5764 Value, DAG.getConstant(index, dl, MVT::i32)), in LowerBUILD_VECTOR()
5765 DAG.getConstant(index, dl, MVT::i32)); in LowerBUILD_VECTOR()
5767 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
5770 N = DAG.getNode(ARMISD::VDUP, dl, VT, Value); in LowerBUILD_VECTOR()
5781 Ops.push_back(DAG.getConstant(I, dl, MVT::i32)); in LowerBUILD_VECTOR()
5782 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ops); in LowerBUILD_VECTOR()
5790 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, MVT::i32, in LowerBUILD_VECTOR()
5793 SDValue Val = DAG.getBuildVector(VecVT, dl, Ops); in LowerBUILD_VECTOR()
5796 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
5799 SDValue Val = IsSingleInstrConstant(Value, DAG, ST, dl); in LowerBUILD_VECTOR()
5801 return DAG.getNode(ARMISD::VDUP, dl, VT, Val); in LowerBUILD_VECTOR()
5828 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); in LowerBUILD_VECTOR()
5829 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
5830 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
5845 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i32); in LowerBUILD_VECTOR()
5846 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
5859 SDLoc dl(Op); in ReconstructShuffle() local
5952 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
5968 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
5969 DAG.getConstant(NumSrcElts, dl, MVT::i32)); in ReconstructShuffle()
5974 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
5975 DAG.getConstant(0, dl, MVT::i32)); in ReconstructShuffle()
5979 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
5980 DAG.getConstant(0, dl, MVT::i32)); in ReconstructShuffle()
5982 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
5983 DAG.getConstant(NumSrcElts, dl, MVT::i32)); in ReconstructShuffle()
5985 Src.ShuffleVec = DAG.getNode(ARMISD::VEXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
5987 DAG.getConstant(Src.MinElt, dl, MVT::i32)); in ReconstructShuffle()
6000 Src.ShuffleVec = DAG.getNode(ISD::BITCAST, dl, ShuffleVT, Src.ShuffleVec); in ReconstructShuffle()
6052 SDValue Shuffle = DAG.getVectorShuffle(ShuffleVT, dl, ShuffleOps[0], in ReconstructShuffle()
6054 return DAG.getNode(ISD::BITCAST, dl, VT, Shuffle); in ReconstructShuffle()
6103 const SDLoc &dl) { in GeneratePerfectShuffle() argument
6133 OpLHS = GeneratePerfectShuffle(PerfectShuffleTable[LHSID], LHS, RHS, DAG, dl); in GeneratePerfectShuffle()
6134 OpRHS = GeneratePerfectShuffle(PerfectShuffleTable[RHSID], LHS, RHS, DAG, dl); in GeneratePerfectShuffle()
6143 return DAG.getNode(ARMISD::VREV64, dl, VT, OpLHS); in GeneratePerfectShuffle()
6146 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
6149 return DAG.getNode(ARMISD::VREV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
6154 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, in GeneratePerfectShuffle()
6155 OpLHS, DAG.getConstant(OpNum-OP_VDUP0, dl, MVT::i32)); in GeneratePerfectShuffle()
6159 return DAG.getNode(ARMISD::VEXT, dl, VT, in GeneratePerfectShuffle()
6161 DAG.getConstant(OpNum - OP_VEXT1 + 1, dl, MVT::i32)); in GeneratePerfectShuffle()
6164 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
6168 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
6172 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
6218 SDLoc dl(Op); in LowerVECTOR_SHUFFLE() local
6239 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
6253 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
6255 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1, in LowerVECTOR_SHUFFLE()
6256 DAG.getConstant(Lane, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
6264 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
6265 DAG.getConstant(Imm, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
6269 return DAG.getNode(ARMISD::VREV64, dl, VT, V1); in LowerVECTOR_SHUFFLE()
6271 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
6273 return DAG.getNode(ARMISD::VREV16, dl, VT, V1); in LowerVECTOR_SHUFFLE()
6276 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
6277 DAG.getConstant(Imm, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
6291 return DAG.getNode(ShuffleOpc, dl, DAG.getVTList(VT, VT), V1, V2) in LowerVECTOR_SHUFFLE()
6326 SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT), in LowerVECTOR_SHUFFLE()
6328 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Res.getValue(0), in LowerVECTOR_SHUFFLE()
6353 return GeneratePerfectShuffle(PFEntry, V1, V2, DAG, dl); in LowerVECTOR_SHUFFLE()
6362 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
6363 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
6369 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in LowerVECTOR_SHUFFLE()
6372 dl, MVT::i32))); in LowerVECTOR_SHUFFLE()
6374 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
6375 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerVECTOR_SHUFFLE()
6406 SDLoc dl(Op); in LowerEXTRACT_VECTOR_ELT() local
6407 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
6418 SDLoc dl(Op); in LowerCONCAT_VECTORS() local
6423 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
6424 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op0), in LowerCONCAT_VECTORS()
6425 DAG.getIntPtrConstant(0, dl)); in LowerCONCAT_VECTORS()
6427 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
6428 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op1), in LowerCONCAT_VECTORS()
6429 DAG.getIntPtrConstant(1, dl)); in LowerCONCAT_VECTORS()
6430 return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); in LowerCONCAT_VECTORS()
6602 SDLoc dl(N); in SkipExtensionForVMULL() local
6608 Ops.push_back(DAG.getConstant(CInt.zextOrTrunc(32), dl, MVT::i32)); in SkipExtensionForVMULL()
6610 return DAG.getBuildVector(MVT::getVectorVT(TruncVT, NumElts), dl, Ops); in SkipExtensionForVMULL()
6710 static SDValue LowerSDIV_v4i8(SDValue X, SDValue Y, const SDLoc &dl, in LowerSDIV_v4i8() argument
6717 X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
6718 Y = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, Y); in LowerSDIV_v4i8()
6719 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
6720 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
6723 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
6724 DAG.getConstant(Intrinsic::arm_neon_vrecpe, dl, MVT::i32), in LowerSDIV_v4i8()
6730 X = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, X, Y); in LowerSDIV_v4i8()
6731 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
6732 Y = DAG.getConstant(0xb000, dl, MVT::v4i32); in LowerSDIV_v4i8()
6733 X = DAG.getNode(ISD::ADD, dl, MVT::v4i32, X, Y); in LowerSDIV_v4i8()
6734 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
6736 X = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
6737 X = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, X); in LowerSDIV_v4i8()
6741 static SDValue LowerSDIV_v4i16(SDValue N0, SDValue N1, const SDLoc &dl, in LowerSDIV_v4i16() argument
6749 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
6750 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1); in LowerSDIV_v4i16()
6751 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
6752 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
6757 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
6758 DAG.getConstant(Intrinsic::arm_neon_vrecpe, dl, MVT::i32), in LowerSDIV_v4i16()
6760 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
6761 DAG.getConstant(Intrinsic::arm_neon_vrecps, dl, MVT::i32), in LowerSDIV_v4i16()
6763 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerSDIV_v4i16()
6768 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerSDIV_v4i16()
6769 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
6770 N1 = DAG.getConstant(0x89, dl, MVT::v4i32); in LowerSDIV_v4i16()
6771 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerSDIV_v4i16()
6772 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
6775 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
6776 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerSDIV_v4i16()
6785 SDLoc dl(Op); in LowerSDIV() local
6791 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0); in LowerSDIV()
6792 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1); in LowerSDIV()
6794 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
6795 DAG.getIntPtrConstant(4, dl)); in LowerSDIV()
6796 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
6797 DAG.getIntPtrConstant(4, dl)); in LowerSDIV()
6798 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
6799 DAG.getIntPtrConstant(0, dl)); in LowerSDIV()
6800 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
6801 DAG.getIntPtrConstant(0, dl)); in LowerSDIV()
6803 N0 = LowerSDIV_v4i8(N0, N1, dl, DAG); // v4i16 in LowerSDIV()
6804 N2 = LowerSDIV_v4i8(N2, N3, dl, DAG); // v4i16 in LowerSDIV()
6806 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerSDIV()
6809 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0); in LowerSDIV()
6812 return LowerSDIV_v4i16(N0, N1, dl, DAG); in LowerSDIV()
6821 SDLoc dl(Op); in LowerUDIV() local
6827 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0); in LowerUDIV()
6828 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1); in LowerUDIV()
6830 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
6831 DAG.getIntPtrConstant(4, dl)); in LowerUDIV()
6832 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
6833 DAG.getIntPtrConstant(4, dl)); in LowerUDIV()
6834 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
6835 DAG.getIntPtrConstant(0, dl)); in LowerUDIV()
6836 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
6837 DAG.getIntPtrConstant(0, dl)); in LowerUDIV()
6839 N0 = LowerSDIV_v4i16(N0, N1, dl, DAG); // v4i16 in LowerUDIV()
6840 N2 = LowerSDIV_v4i16(N2, N3, dl, DAG); // v4i16 in LowerUDIV()
6842 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerUDIV()
6845 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
6846 DAG.getConstant(Intrinsic::arm_neon_vqmovnsu, dl, in LowerUDIV()
6855 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N0); in LowerUDIV()
6856 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N1); in LowerUDIV()
6857 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
6858 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
6864 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
6865 DAG.getConstant(Intrinsic::arm_neon_vrecpe, dl, MVT::i32), in LowerUDIV()
6867 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
6868 DAG.getConstant(Intrinsic::arm_neon_vrecps, dl, MVT::i32), in LowerUDIV()
6870 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
6871 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
6872 DAG.getConstant(Intrinsic::arm_neon_vrecps, dl, MVT::i32), in LowerUDIV()
6874 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
6879 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerUDIV()
6880 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerUDIV()
6881 N1 = DAG.getConstant(2, dl, MVT::v4i32); in LowerUDIV()
6882 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerUDIV()
6883 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerUDIV()
6886 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerUDIV()
6887 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerUDIV()
6917 SDLoc dl(Op); in LowerFSINCOS() local
6965 CLI.setDebugLoc(dl) in LowerFSINCOS()
6974 SDValue LoadSin = DAG.getLoad(ArgVT, dl, CallResult.second, SRet, in LowerFSINCOS()
6978 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, SRet, in LowerFSINCOS()
6979 DAG.getIntPtrConstant(ArgVT.getStoreSize(), dl)); in LowerFSINCOS()
6980 SDValue LoadCos = DAG.getLoad(ArgVT, dl, LoadSin.getValue(1), Add, in LowerFSINCOS()
6984 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys, in LowerFSINCOS()
6994 SDLoc dl(Op); in LowerWindowsDIVLibCall() local
7017 CLI.setDebugLoc(dl) in LowerWindowsDIVLibCall()
7029 SDLoc dl(Op); in LowerDIV_Windows() local
7031 SDValue DBZCHK = DAG.getNode(ARMISD::WIN__DBZCHK, dl, MVT::Other, in LowerDIV_Windows()
7045 SDLoc dl(Op); in ExpandDIV_Windows() local
7047 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op.getOperand(1), in ExpandDIV_Windows()
7048 DAG.getConstant(0, dl, MVT::i32)); in ExpandDIV_Windows()
7049 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op.getOperand(1), in ExpandDIV_Windows()
7050 DAG.getConstant(1, dl, MVT::i32)); in ExpandDIV_Windows()
7051 SDValue Or = DAG.getNode(ISD::OR, dl, MVT::i32, Lo, Hi); in ExpandDIV_Windows()
7054 DAG.getNode(ARMISD::WIN__DBZCHK, dl, MVT::Other, DAG.getEntryNode(), Or); in ExpandDIV_Windows()
7058 SDValue Lower = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Result); in ExpandDIV_Windows()
7059 SDValue Upper = DAG.getNode(ISD::SRL, dl, MVT::i64, Result, in ExpandDIV_Windows()
7060 DAG.getConstant(32, dl, TLI.getPointerTy(DL))); in ExpandDIV_Windows()
7061 Upper = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Upper); in ExpandDIV_Windows()
7101 SDLoc dl(V.getNode()); in createGPRPairNode() local
7102 SDValue VLo = DAG.getAnyExtOrTrunc(V, dl, MVT::i32); in createGPRPairNode()
7104 DAG.getNode(ISD::SRL, dl, MVT::i64, V, DAG.getConstant(32, dl, MVT::i32)), in createGPRPairNode()
7105 dl, MVT::i32); in createGPRPairNode()
7107 DAG.getTargetConstant(ARM::GPRPairRegClassID, dl, MVT::i32); in createGPRPairNode()
7108 SDValue SubReg0 = DAG.getTargetConstant(ARM::gsub_0, dl, MVT::i32); in createGPRPairNode()
7109 SDValue SubReg1 = DAG.getTargetConstant(ARM::gsub_1, dl, MVT::i32); in createGPRPairNode()
7112 DAG.getMachineNode(TargetOpcode::REG_SEQUENCE, dl, MVT::Untyped, Ops), 0); in createGPRPairNode()
7287 DebugLoc dl = MI.getDebugLoc(); in SetupEntryBlockForSjLj() local
7323 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2LDRpci), NewVReg1) in SetupEntryBlockForSjLj()
7329 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2ORRri), NewVReg2) in SetupEntryBlockForSjLj()
7333 BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg3) in SetupEntryBlockForSjLj()
7336 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2STRi12)) in SetupEntryBlockForSjLj()
7350 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci), NewVReg1) in SetupEntryBlockForSjLj()
7354 BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg2) in SetupEntryBlockForSjLj()
7359 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tMOVi8), NewVReg3) in SetupEntryBlockForSjLj()
7363 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tORR), NewVReg4) in SetupEntryBlockForSjLj()
7368 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
7371 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tSTRi)) in SetupEntryBlockForSjLj()
7382 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::LDRi12), NewVReg1) in SetupEntryBlockForSjLj()
7387 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::PICADD), NewVReg2) in SetupEntryBlockForSjLj()
7390 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::STRi12)) in SetupEntryBlockForSjLj()
7401 DebugLoc dl = MI.getDebugLoc(); in EmitSjLjDispatchBlock() local
7473 BuildMI(TrapBB, dl, TII->get(trap_opcode)); in EmitSjLjDispatchBlock()
7493 MIB = BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup)); in EmitSjLjDispatchBlock()
7506 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
7512 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri)) in EmitSjLjDispatchBlock()
7517 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1) in EmitSjLjDispatchBlock()
7523 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVTi16), VReg2) in EmitSjLjDispatchBlock()
7528 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPrr)) in EmitSjLjDispatchBlock()
7533 BuildMI(DispatchBB, dl, TII->get(ARM::t2Bcc)) in EmitSjLjDispatchBlock()
7539 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT),NewVReg3) in EmitSjLjDispatchBlock()
7545 BuildMI(DispContBB, dl, TII->get(ARM::t2ADDrs), NewVReg4) in EmitSjLjDispatchBlock()
7550 BuildMI(DispContBB, dl, TII->get(ARM::t2BR_JT)) in EmitSjLjDispatchBlock()
7556 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRspi), NewVReg1) in EmitSjLjDispatchBlock()
7562 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPi8)) in EmitSjLjDispatchBlock()
7577 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tLDRpci)) in EmitSjLjDispatchBlock()
7580 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::tCMPr)) in EmitSjLjDispatchBlock()
7585 BuildMI(DispatchBB, dl, TII->get(ARM::tBcc)) in EmitSjLjDispatchBlock()
7591 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLSLri), NewVReg2) in EmitSjLjDispatchBlock()
7597 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLEApcrelJT), NewVReg3) in EmitSjLjDispatchBlock()
7601 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg4) in EmitSjLjDispatchBlock()
7610 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
7618 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg6) in EmitSjLjDispatchBlock()
7624 BuildMI(DispContBB, dl, TII->get(ARM::tBR_JTr)) in EmitSjLjDispatchBlock()
7629 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
7635 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri)) in EmitSjLjDispatchBlock()
7640 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1) in EmitSjLjDispatchBlock()
7646 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2) in EmitSjLjDispatchBlock()
7651 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) in EmitSjLjDispatchBlock()
7666 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::LDRcp)) in EmitSjLjDispatchBlock()
7670 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) in EmitSjLjDispatchBlock()
7675 BuildMI(DispatchBB, dl, TII->get(ARM::Bcc)) in EmitSjLjDispatchBlock()
7682 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg3) in EmitSjLjDispatchBlock()
7686 AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::LEApcrelJT), NewVReg4) in EmitSjLjDispatchBlock()
7693 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
7700 BuildMI(DispContBB, dl, TII->get(ARM::BR_JTadd)) in EmitSjLjDispatchBlock()
7705 BuildMI(DispContBB, dl, TII->get(ARM::BR_JTr)) in EmitSjLjDispatchBlock()
7836 const TargetInstrInfo *TII, const DebugLoc &dl, in emitPostLd() argument
7842 AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data) in emitPostLd()
7847 AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data) in emitPostLd()
7850 BuildMI(*BB, Pos, dl, TII->get(ARM::tADDi8), AddrOut); in emitPostLd()
7855 AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data) in emitPostLd()
7859 AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data) in emitPostLd()
7868 const TargetInstrInfo *TII, const DebugLoc &dl, in emitPostSt() argument
7874 AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut) in emitPostSt()
7878 AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc)).addReg(Data) in emitPostSt()
7881 BuildMI(*BB, Pos, dl, TII->get(ARM::tADDi8), AddrOut); in emitPostSt()
7886 AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut) in emitPostSt()
7889 AddDefaultPred(BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut) in emitPostSt()
7909 DebugLoc dl = MI.getDebugLoc(); in EmitStructByval() local
7959 emitPostLd(BB, MI, TII, dl, UnitSize, scratch, srcIn, srcOut, in EmitStructByval()
7961 emitPostSt(BB, MI, TII, dl, UnitSize, scratch, destIn, destOut, in EmitStructByval()
7974 emitPostLd(BB, MI, TII, dl, 1, scratch, srcIn, srcOut, in EmitStructByval()
7976 emitPostSt(BB, MI, TII, dl, 1, scratch, destIn, destOut, in EmitStructByval()
8021 AddDefaultPred(BuildMI(BB, dl, in EmitStructByval()
8026 AddDefaultPred(BuildMI(BB, dl, in EmitStructByval()
8043 AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(ARM::tLDRpci)).addReg( in EmitStructByval()
8046 AddDefaultPred(BuildMI(*BB, MI, dl, TII->get(ARM::LDRcp)).addReg( in EmitStructByval()
8064 BuildMI(*BB, BB->begin(), dl, TII->get(ARM::PHI), varPhi) in EmitStructByval()
8067 BuildMI(BB, dl, TII->get(ARM::PHI), srcPhi) in EmitStructByval()
8070 BuildMI(BB, dl, TII->get(ARM::PHI), destPhi) in EmitStructByval()
8077 emitPostLd(BB, BB->end(), TII, dl, UnitSize, scratch, srcPhi, srcLoop, in EmitStructByval()
8079 emitPostSt(BB, BB->end(), TII, dl, UnitSize, scratch, destPhi, destLoop, in EmitStructByval()
8085 BuildMI(*BB, BB->end(), dl, TII->get(ARM::tSUBi8), varLoop); in EmitStructByval()
8091 BuildMI(*BB, BB->end(), dl, in EmitStructByval()
8097 BuildMI(*BB, BB->end(), dl, in EmitStructByval()
8117 emitPostLd(BB, StartOfExit, TII, dl, 1, scratch, srcIn, srcOut, in EmitStructByval()
8119 emitPostSt(BB, StartOfExit, TII, dl, 1, scratch, destIn, destOut, in EmitStructByval()
8229 DebugLoc dl = MI.getDebugLoc(); in EmitInstrWithCustomInserter() local
8261 BuildMI(*BB, MI, dl, TII->get(NewOpc)) in EmitInstrWithCustomInserter()
8282 MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(NewOpc)); in EmitInstrWithCustomInserter()
8318 BuildMI(BB, dl, TII->get(ARM::tBcc)) in EmitInstrWithCustomInserter()
8335 BuildMI(*BB, BB->begin(), dl, TII->get(ARM::PHI), MI.getOperand(0).getReg()) in EmitInstrWithCustomInserter()
8357 AddDefaultPred(BuildMI(BB, dl, in EmitInstrWithCustomInserter()
8360 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri)) in EmitInstrWithCustomInserter()
8366 AddDefaultPred(BuildMI(BB, dl, in EmitInstrWithCustomInserter()
8369 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr)) in EmitInstrWithCustomInserter()
8379 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc)) in EmitInstrWithCustomInserter()
8382 AddDefaultPred(BuildMI(BB, dl, TII->get(ARM::t2B)).addMBB(exitMBB)); in EmitInstrWithCustomInserter()
8384 BuildMI(BB, dl, TII->get(ARM::B)) .addMBB(exitMBB); in EmitInstrWithCustomInserter()
8445 AddDefaultPred(BuildMI(BB, dl, in EmitInstrWithCustomInserter()
8450 BuildMI(BB, dl, in EmitInstrWithCustomInserter()
8457 BuildMI(*RSBBB, RSBBB->begin(), dl, in EmitInstrWithCustomInserter()
8464 BuildMI(*SinkBB, SinkBB->begin(), dl, in EmitInstrWithCustomInserter()
8632 SDLoc dl(N); in isConditionalZeroOrAllOnes() local
8641 OtherOp = DAG.getConstant(0, dl, VT); in isConditionalZeroOrAllOnes()
8644 OtherOp = DAG.getConstant(1, dl, VT); in isConditionalZeroOrAllOnes()
8646 OtherOp = DAG.getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), dl, in isConditionalZeroOrAllOnes()
8782 SDLoc dl(N); in AddCombineToVPADDL() local
8786 Ops.push_back(DAG.getConstant(Intrinsic::arm_neon_vpaddls, dl, in AddCombineToVPADDL()
8805 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, widenType, Ops); in AddCombineToVPADDL()
8807 return DAG.getNode(ExtOp, dl, VT, tmp); in AddCombineToVPADDL()
9227 SDLoc dl(N); in PerformANDCombine() local
9243 DAG, dl, VbicVT, VT.is128BitVector(), in PerformANDCombine()
9247 DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0)); in PerformANDCombine()
9248 SDValue Vbic = DAG.getNode(ARMISD::VBICIMM, dl, VbicVT, Input, Val); in PerformANDCombine()
9249 return DAG.getNode(ISD::BITCAST, dl, VT, Vbic); in PerformANDCombine()
9269 SDLoc dl(N); in PerformORCombine() local
9285 DAG, dl, VorrVT, VT.is128BitVector(), in PerformORCombine()
9289 DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0)); in PerformORCombine()
9290 SDValue Vorr = DAG.getNode(ARMISD::VORRIMM, dl, VorrVT, Input, Val); in PerformORCombine()
9291 return DAG.getNode(ISD::BITCAST, dl, VT, Vorr); in PerformORCombine()
9333 SDValue Result = DAG.getNode(ARMISD::VBSL, dl, CanonicalVT, in PerformORCombine()
9337 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in PerformORCombine()
9599 SDLoc dl(N); in PerformBFICombine() local
9603 ISD::SRL, dl, VT, From1, in PerformBFICombine()
9604 DCI.DAG.getConstant(NewFromMask.countTrailingZeros(), dl, VT)); in PerformBFICombine()
9605 return DCI.DAG.getNode(ARMISD::BFI, dl, VT, N->getOperand(0), From1, in PerformBFICombine()
9606 DCI.DAG.getConstant(~NewToMask, dl, VT)); in PerformBFICombine()
9706 SDLoc dl(N); in PerformBUILD_VECTORCombine() local
9710 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(i)); in PerformBUILD_VECTORCombine()
9716 SDValue BV = DAG.getBuildVector(FloatVT, dl, Ops); in PerformBUILD_VECTORCombine()
9717 return DAG.getNode(ISD::BITCAST, dl, VT, BV); in PerformBUILD_VECTORCombine()
9789 SDLoc dl(N); in PerformARMBUILD_VECTORCombine() local
9803 SDValue LaneIdx = DAG.getConstant(Idx, dl, MVT::i32); in PerformARMBUILD_VECTORCombine()
9804 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
9806 Vec = DAG.getNode(ISD::BITCAST, dl, VT, Vec); in PerformARMBUILD_VECTORCombine()
9825 SDLoc dl(N); in PerformInsertEltCombine() local
9828 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
9829 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(1)); in PerformInsertEltCombine()
9833 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
9835 return DAG.getNode(ISD::BITCAST, dl, VT, InsElt); in PerformInsertEltCombine()
9904 SDLoc dl(N); in CombineBaseUpdate() local
10066 Ops.push_back(DAG.getConstant(Alignment, dl, MVT::i32)); in CombineBaseUpdate()
10072 StVal = DAG.getNode(ISD::BITCAST, dl, AlignedVecTy, StVal); in CombineBaseUpdate()
10075 SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, dl, SDTys, in CombineBaseUpdate()
10088 LdVal = DAG.getNode(ISD::BITCAST, dl, VecTy, LdVal); in CombineBaseUpdate()
10354 SDLoc dl(StVal); in PerformSTORECombine() local
10358 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
10359 SDValue ExtElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, in PerformSTORECombine()
10361 dl = SDLoc(N); in PerformSTORECombine()
10362 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ExtElt); in PerformSTORECombine()
10367 return DAG.getStore(St->getChain(), dl, V, St->getBasePtr(), in PerformSTORECombine()
10423 SDLoc dl(N); in PerformVCVTCombine() local
10428 ISD::INTRINSIC_WO_CHAIN, dl, NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, in PerformVCVTCombine()
10429 DAG.getConstant(IntrinsicOpcode, dl, MVT::i32), Op->getOperand(0), in PerformVCVTCombine()
10430 DAG.getConstant(C, dl, MVT::i32)); in PerformVCVTCombine()
10433 FixConv = DAG.getNode(ISD::TRUNCATE, dl, N->getValueType(0), FixConv); in PerformVCVTCombine()
10481 SDLoc dl(N); in PerformVDIVCombine() local
10486 dl, NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, in PerformVDIVCombine()
10491 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, in PerformVDIVCombine()
10493 DAG.getConstant(IntrinsicOpcode, dl, MVT::i32), in PerformVDIVCombine()
10494 ConvInput, DAG.getConstant(C, dl, MVT::i32)); in PerformVDIVCombine()
10659 SDLoc dl(N); in PerformIntrinsicCombine() local
10660 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
10661 N->getOperand(1), DAG.getConstant(Cnt, dl, MVT::i32)); in PerformIntrinsicCombine()
10677 SDLoc dl(N); in PerformIntrinsicCombine() local
10678 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
10680 DAG.getConstant(Cnt, dl, MVT::i32)); in PerformIntrinsicCombine()
10726 SDLoc dl(N); in PerformShiftCombine() local
10727 return DAG.getNode(ARMISD::VSHL, dl, VT, N->getOperand(0), in PerformShiftCombine()
10728 DAG.getConstant(Cnt, dl, MVT::i32)); in PerformShiftCombine()
10737 SDLoc dl(N); in PerformShiftCombine() local
10738 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in PerformShiftCombine()
10739 DAG.getConstant(Cnt, dl, MVT::i32)); in PerformShiftCombine()
10880 SDLoc dl(X); in PerformCMOVToBFICombine() local
10886 X = DAG.getNode(ISD::SRL, dl, VT, X, in PerformCMOVToBFICombine()
10887 DAG.getConstant(BitInX, dl, VT)); in PerformCMOVToBFICombine()
10896 V = DAG.getNode(ARMISD::BFI, dl, VT, V, X, in PerformCMOVToBFICombine()
10898 DAG.getConstant(~Mask, dl, VT)); in PerformCMOVToBFICombine()
10913 SDLoc dl(N); in PerformBRCONDCombine() local
10936 ARMISD::BRCOND, dl, VT, Chain, BB, LHS->getOperand(0)->getOperand(2), in PerformBRCONDCombine()
10953 SDLoc dl(N); in PerformCMOVCombine() local
10988 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc, in PerformCMOVCombine()
10992 SDValue NewCmp = getARMCmp(LHS, RHS, ISD::SETNE, ARMcc, DAG, dl); in PerformCMOVCombine()
10993 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc, in PerformCMOVCombine()
11006 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, in PerformCMOVCombine()
11017 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
11020 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
11023 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
12069 SDLoc dl(Op); in LowerDivRem() local
12071 CLI.setDebugLoc(dl).setChain(InChain) in LowerDivRem()