1261   unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode);  in MergeBaseUpdateLSMultiple()  local
1262   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc))  in MergeBaseUpdateLSMultiple()
1361   unsigned NewOpc;  in MergeBaseUpdateLoadStore()  local
1363     NewOpc = getPreIndexedLoadStoreOpcode(Opcode, ARM_AM::add);  in MergeBaseUpdateLoadStore()
1365     NewOpc = getPreIndexedLoadStoreOpcode(Opcode, ARM_AM::sub);  in MergeBaseUpdateLoadStore()
1369       NewOpc = getPostIndexedLoadStoreOpcode(Opcode, ARM_AM::add);  in MergeBaseUpdateLoadStore()
1371       NewOpc = getPostIndexedLoadStoreOpcode(Opcode, ARM_AM::sub);  in MergeBaseUpdateLoadStore()
1386     BuildMI(MBB, MBBI, DL, TII->get(NewOpc))  in MergeBaseUpdateLoadStore()
1395       if (NewOpc == ARM::LDR_PRE_IMM || NewOpc == ARM::LDRB_PRE_IMM) {  in MergeBaseUpdateLoadStore()
1396         BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())  in MergeBaseUpdateLoadStore()
1401         BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())  in MergeBaseUpdateLoadStore()
1407       BuildMI(MBB, MBBI, DL, TII->get(NewOpc), MI->getOperand(0).getReg())  in MergeBaseUpdateLoadStore()
1416     if (isAM2 && NewOpc == ARM::STR_POST_IMM) {  in MergeBaseUpdateLoadStore()
1419       BuildMI(MBB, MBBI, DL, TII->get(NewOpc), Base)  in MergeBaseUpdateLoadStore()
1424       BuildMI(MBB, MBBI, DL, TII->get(NewOpc), Base)  in MergeBaseUpdateLoadStore()
1457   unsigned NewOpc;  in MergeBaseUpdateLSDouble()  local
1459     NewOpc = Opcode == ARM::t2LDRDi8 ? ARM::t2LDRD_PRE : ARM::t2STRD_PRE;  in MergeBaseUpdateLSDouble()
1463       NewOpc = Opcode == ARM::t2LDRDi8 ? ARM::t2LDRD_POST : ARM::t2STRD_POST;  in MergeBaseUpdateLSDouble()
1470   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc));  in MergeBaseUpdateLSDouble()
1471   if (NewOpc == ARM::t2LDRD_PRE || NewOpc == ARM::t2LDRD_POST) {  in MergeBaseUpdateLSDouble()
1475     assert(NewOpc == ARM::t2STRD_PRE || NewOpc == ARM::t2STRD_POST);  in MergeBaseUpdateLSDouble()
1482          TII->get(NewOpc).getNumOperands() == 7 &&  in MergeBaseUpdateLSDouble()
1551                           bool isDef, const DebugLoc &DL, unsigned NewOpc,  in InsertLDR_STR()  argument
1559                                       TII->get(NewOpc))  in InsertLDR_STR()
1565                                       TII->get(NewOpc))  in InsertLDR_STR()
1616     unsigned NewOpc = (isLd)  in FixInvalidRegPairOp()  local
1620       BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))  in FixInvalidRegPairOp()
1627       BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))  in FixInvalidRegPairOp()
1638     unsigned NewOpc = (isLd)  in FixInvalidRegPairOp()  local
1657       InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc,  in FixInvalidRegPairOp()
1672       InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc,  in FixInvalidRegPairOp()
1875       unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET);  in MergeReturnIntoLDM()  local
1878       PrevMI.setDesc(TII->get(NewOpc));  in MergeReturnIntoLDM()
1973                           unsigned &NewOpc, unsigned &EvenReg,
2056                                           DebugLoc &dl, unsigned &NewOpc,  in CanFormLdStDWord()  argument
2071     NewOpc = ARM::LDRD;  in CanFormLdStDWord()
2073     NewOpc = ARM::STRD;  in CanFormLdStDWord()
2075     NewOpc = ARM::t2LDRDi8;  in CanFormLdStDWord()
2079     NewOpc = ARM::t2STRDi8;  in CanFormLdStDWord()
2221         unsigned NewOpc = 0;  in RescheduleOps()  local
2224         if (NumMove == 2 && CanFormLdStDWord(Op0, Op1, dl, NewOpc,  in RescheduleOps()
2230           const MCInstrDesc &MCID = TII->get(NewOpc);  in RescheduleOps()