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Lines Matching refs:RS

36     RegisterSet(const RegisterSet &RS) : BitVector(RS) {}  in RegisterSet()
118 : RS(S), TRI(RI) {} in PrintRegSet()
122 const RegisterSet &RS; member
130 for (unsigned R = P.RS.find_first(); R; R = P.RS.find_next(R)) in operator <<()
184 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
881 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) { in isTransparentCopy() argument
883 !TargetRegisterInfo::isVirtualRegister(RS.Reg)) in isTransparentCopy()
890 return DRC == getFinalVRegClass(RS, MRI); in isTransparentCopy()
1013 bool usedBitsEqual(BitTracker::RegisterRef RD, BitTracker::RegisterRef RS);
1226 BitTracker::RegisterRef RS) { in usedBitsEqual() argument
1228 const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg); in usedBitsEqual()
1234 if (!HBS::getSubregMask(RS, SB, SW, MRI)) in usedBitsEqual()
1277 BitTracker::RegisterRef RS = Op; in processBlock() local
1278 if (!BT.has(RS.Reg)) in processBlock()
1280 if (!HBS::isTransparentCopy(RD, RS, MRI)) in processBlock()
1284 if (!HBS::getSubregMask(RS, BN, BW, MRI)) in processBlock()
1287 const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg); in processBlock()
1288 if (!usedBitsEqual(RD, RS) && !HBS::isEqual(DC, 0, SC, BN, BW)) in processBlock()
1296 .addReg(RS.Reg, 0, RS.Sub); in processBlock()
1594 BitTracker::RegisterRef RS = MI.getOperand(1); in propagateRegCopy() local
1595 if (!HBS::isTransparentCopy(RD, RS, MRI)) in propagateRegCopy()
1597 if (RS.Sub != 0) in propagateRegCopy()
1598 Changed = HBS::replaceRegWithSub(RD.Reg, RS.Reg, RS.Sub, MRI); in propagateRegCopy()
1600 Changed = HBS::replaceReg(RD.Reg, RS.Reg, MRI); in propagateRegCopy()
1626 BitTracker::RegisterRef RS = MI.getOperand(SrcX); in propagateRegCopy() local
1627 Changed = HBS::replaceSubWithSub(RD.Reg, Sub, RS.Reg, RS.Sub, MRI); in propagateRegCopy()
1820 BitTracker::RegisterRef RS = ValOp; in genStoreUpperHalf() local
1821 if (!BT.has(RS.Reg)) in genStoreUpperHalf()
1823 const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg); in genStoreUpperHalf()
1864 BitTracker::RegisterRef RS = MI->getOperand(2); in genStoreImmediate() local
1865 if (!BT.has(RS.Reg)) in genStoreImmediate()
1867 const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg); in genStoreImmediate()
2033 BitTracker::RegisterRef RS = Op; in genExtractLow() local
2034 if (!BT.has(RS.Reg)) in genExtractLow()
2036 const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg); in genExtractLow()
2038 if (!HBS::getSubregMask(RS, BN, BW, MRI)) in genExtractLow()
2047 .addReg(RS.Reg, 0, RS.Sub); in genExtractLow()
2073 BitTracker::RegisterRef RS = MI->getOperand(1); in simplifyTstbit() local
2076 if (!BT.has(RS.Reg) || !HBS::getSubregMask(RS, F, W, MRI)) in simplifyTstbit()
2082 const BitTracker::RegisterCell &SC = BT.lookup(RS.Reg); in simplifyTstbit()
2084 if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg != RS.Reg) { in simplifyTstbit()