Lines Matching refs:BitSize
1879 static unsigned getTestUnderMaskCond(unsigned BitSize, unsigned CCMask, in getTestUnderMaskCond() argument
2017 unsigned BitSize = NewC.Op0.getValueType().getSizeInBits(); in adjustForTestUnderMask() local
2022 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, in adjustForTestUnderMask()
2031 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, in adjustForTestUnderMask()
2038 NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal, in adjustForTestUnderMask()
3136 int64_t BitSize = (int64_t)1 << Log2_32_Ceil(NumSignificantBits); in lowerCTPOP() local
3137 BitSize = std::min(BitSize, OrigBitSize); in lowerCTPOP()
3146 for (int64_t I = BitSize / 2; I >= 8; I = I / 2) { in lowerCTPOP()
3148 if (BitSize != OrigBitSize) in lowerCTPOP()
3150 DAG.getConstant(((uint64_t)1 << BitSize) - 1, DL, VT)); in lowerCTPOP()
3155 if (BitSize > 8) in lowerCTPOP()
3157 DAG.getConstant(BitSize - 8, DL, VT)); in lowerCTPOP()
3217 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_LOAD_OP() local
3254 DAG.getConstant(32 - BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
3258 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
3263 DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_LOAD_OP()
3270 DAG.getConstant(BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP()
3327 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_CMP_SWAP() local
3354 NegBitShift, DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_CMP_SWAP()
5313 unsigned BitSize, bool Invert) const { in emitAtomicLoadBinary() argument
5318 bool IsSubWord = (BitSize < 32); in emitAtomicLoadBinary()
5330 BitSize = MI.getOperand(6).getImm(); in emitAtomicLoadBinary()
5333 const TargetRegisterClass *RC = (BitSize <= 32 ? in emitAtomicLoadBinary()
5336 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG; in emitAtomicLoadBinary()
5337 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG; in emitAtomicLoadBinary()
5386 if (BitSize <= 32) in emitAtomicLoadBinary()
5389 .addReg(Tmp).addImm(-1U << (32 - BitSize)); in emitAtomicLoadBinary()
5407 .addImm(32).addImm(31 + BitSize).addImm(32 - BitSize); in emitAtomicLoadBinary()
5430 unsigned KeepOldMask, unsigned BitSize) const { in emitAtomicLoadMinMax()
5435 bool IsSubWord = (BitSize < 32); in emitAtomicLoadMinMax()
5446 BitSize = MI.getOperand(6).getImm(); in emitAtomicLoadMinMax()
5449 const TargetRegisterClass *RC = (BitSize <= 32 ? in emitAtomicLoadMinMax()
5452 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG; in emitAtomicLoadMinMax()
5453 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG; in emitAtomicLoadMinMax()
5510 .addImm(32).addImm(31 + BitSize).addImm(0); in emitAtomicLoadMinMax()
5557 int64_t BitSize = MI.getOperand(7).getImm(); in emitAtomicCmpSwapW() local
5617 .addReg(OldVal).addReg(BitShift).addImm(BitSize); in emitAtomicCmpSwapW()
5619 .addReg(CmpVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0); in emitAtomicCmpSwapW()
5639 .addReg(SwapVal).addReg(Dest).addImm(32).addImm(63 - BitSize).addImm(0); in emitAtomicCmpSwapW()
5641 .addReg(RetrySwapVal).addReg(NegBitShift).addImm(-BitSize); in emitAtomicCmpSwapW()