Lines Matching refs:V3
620 bits<5> V3;
626 let Inst{35-32} = V3{3-0};
630 let Inst{10} = V3{4};
642 bits<5> V3;
649 let Inst{31-28} = V3{3-0};
655 let Inst{9} = V3{4};
723 bits<5> V3;
730 let Inst{31-28} = V3{3-0};
740 let Inst{9} = V3{4};
752 bits<5> V3;
760 let Inst{31-28} = V3{3-0};
767 let Inst{9} = V3{4};
782 bits<5> V3;
790 let Inst{31-28} = V3{3-0};
800 let Inst{9} = V3{4};
812 bits<5> V3;
820 let Inst{31-28} = V3{3-0};
827 let Inst{9} = V3{4};
858 bits<5> V3;
863 let Inst{35-32} = V3{3-0};
867 let Inst{10} = V3{4};
899 bits<5> V3;
904 let Inst{35-32} = V3{3-0};
908 let Inst{10} = V3{4};
1088 : InstVRSa<opcode, (outs VR128:$V1, VR128:$V3), (ins bdaddr12only:$BD2),
1089 mnemonic#"\t$V1, $V3, $BD2", []> {
1187 : InstVRSa<opcode, (outs), (ins VR128:$V1, VR128:$V3, bdaddr12only:$BD2),
1188 mnemonic#"\t$V1, $V3, $BD2", []> {
1744 : InstVRIc<opcode, (outs tr1.op:$V1), (ins tr2.op:$V3, imm32zx16:$I2),
1745 mnemonic#"\t$V1, $V3, $I2",
1746 [(set tr1.op:$V1, (tr1.vt (operator (tr2.vt tr2.op:$V3),
1771 : InstVRRb<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, tr2.op:$V3),
1772 mnemonic#"\t$V1, $V2, $V3",
1774 (tr2.vt tr2.op:$V3))))]> {
1795 : InstVRRc<opcode, (outs tr1.op:$V1), (ins tr2.op:$V2, tr2.op:$V3),
1796 mnemonic#"\t$V1, $V2, $V3",
1798 (tr2.vt tr2.op:$V3))))]> {
1823 : InstVRSa<opcode, (outs tr1.op:$V1), (ins tr2.op:$V3, shift12only:$BD2),
1824 mnemonic#"\t$V1, $V3, $BD2",
1825 [(set tr1.op:$V1, (tr1.vt (operator (tr2.vt tr2.op:$V3),
1842 : InstVRSc<opcode, (outs GR64:$R1), (ins tr.op:$V3, shift12only:$BD2),
1843 mnemonic#"\t$R1, $V3, $BD2",
1844 [(set GR64:$R1, (operator (tr.vt tr.op:$V3), shift12only:$BD2))]> {
2110 (ins tr2.op:$V2, tr2.op:$V3, imm32zx8:$I4),
2111 mnemonic#"\t$V1, $V2, $V3, $I4",
2113 (tr2.vt tr2.op:$V3),
2134 (ins tr2.op:$V2, tr2.op:$V3, m5mask:$M5),
2135 mnemonic#"\t$V1, $V2, $V3, $M5",
2137 (tr2.vt tr2.op:$V3),
2149 def : InstAlias<mnemonic#"\t$V1, $V2, $V3",
2151 tr2.op:$V3, 0)>;
2155 def : InstAlias<mnemonic#"s\t$V1, $V2, $V3",
2157 tr2.op:$V3, 0)>;
2163 (ins tr2.op:$V2, tr2.op:$V3, imm32zx4:$M4),
2164 mnemonic#"\t$V1, $V2, $V3, $M4",
2166 (tr2.vt tr2.op:$V3),
2175 (ins tr2.op:$V2, tr2.op:$V3, tr1.op:$V4),
2176 mnemonic#"\t$V1, $V2, $V3, $V4",
2178 (tr2.vt tr2.op:$V3),
2187 (ins tr2.op:$V2, tr2.op:$V3, tr1.op:$V4),
2188 mnemonic#"\t$V1, $V2, $V3, $V4",
2190 (tr2.vt tr2.op:$V3),
2237 (ins tr2.op:$V1src, tr2.op:$V2, tr2.op:$V3, imm32zx8:$I4),
2238 mnemonic#"\t$V1, $V2, $V3, $I4",
2241 (tr2.vt tr2.op:$V3),
2252 (ins tr2.op:$V2, tr2.op:$V3, tr2.op:$V4, m6mask:$M6),
2253 mnemonic#"\t$V1, $V2, $V3, $V4, $M6",
2255 (tr2.vt tr2.op:$V3),
2268 def : InstAlias<mnemonic#"\t$V1, $V2, $V3, $V4",
2270 tr2.op:$V3, tr2.op:$V4, 0)>;
2274 def : InstAlias<mnemonic#"s\t$V1, $V2, $V3, $V4",
2276 tr2.op:$V3, tr2.op:$V4, 0)>;