726     setOperationAction(ISD::VSELECT,            MVT::v4f32, Custom);  in X86TargetLowering()
785       setOperationAction(ISD::VSELECT,            VT, Custom);  in X86TargetLowering()
808       setOperationAction(ISD::VSELECT,            VT, Custom);  in X86TargetLowering()
902     setOperationAction(ISD::VSELECT,            MVT::v16i8, Legal);  in X86TargetLowering()
1107       setOperationAction(ISD::VSELECT,            VT, Custom);  in X86TargetLowering()
1116       setOperationAction(ISD::VSELECT,         MVT::v32i8, Legal);  in X86TargetLowering()
1221     setOperationAction(ISD::VSELECT,            MVT::v8i1,  Expand);  in X86TargetLowering()
1222     setOperationAction(ISD::VSELECT,            MVT::v16i1, Expand);  in X86TargetLowering()
1398       setOperationAction(ISD::VSELECT,             VT, Legal);  in X86TargetLowering()
1459     setOperationAction(ISD::VSELECT,            MVT::v32i16, Legal);  in X86TargetLowering()
1460     setOperationAction(ISD::VSELECT,            MVT::v64i8, Legal);  in X86TargetLowering()
1468     setOperationAction(ISD::VSELECT,            MVT::v32i1, Expand);  in X86TargetLowering()
1469     setOperationAction(ISD::VSELECT,            MVT::v64i1, Expand);  in X86TargetLowering()
1499       setOperationAction(ISD::VSELECT,      VT, Legal);  in X86TargetLowering()
1548     setOperationAction(ISD::VSELECT,            MVT::v2i1, Expand);  in X86TargetLowering()
1549     setOperationAction(ISD::VSELECT,            MVT::v4i1, Expand);  in X86TargetLowering()
1635   setTargetDAGCombine(ISD::VSELECT);  in X86TargetLowering()
7614         VT, DAG.getNode(ISD::VSELECT, DL, BlendVT,  in lowerVectorShuffleAsBlend()
14048   SDValue SelectedVal = DAG.getNode(ISD::VSELECT, DL, ExtVT, In, One, Zero);  in LowerZERO_EXTEND_AVX512()
15777         SDValue VSel = DAG.getNode(ISD::VSELECT, DL, VecVT, VCmp, VOp1, VOp2);  in LowerSELECT()
16044   SDValue V = DAG.getNode(ISD::VSELECT, dl, ExtVT, In, NegOne, Zero);  in LowerSIGN_EXTEND_AVX512()
17223   unsigned OpcodeSelect = ISD::VSELECT;  in getVectorMaskingNode()
20240                               DAG.getNode(ISD::VSELECT, dl, VT, Sel, V0, V1));  in LowerShift()
20247       return DAG.getNode(ISD::VSELECT, dl, SelVT, C, V0, V1);  in LowerShift()
20383             VT, DAG.getNode(ISD::VSELECT, dl, ExtVT, Sel, V0, V1));  in LowerShift()
20390       return DAG.getNode(ISD::VSELECT, dl, VT, C, V0, V1);  in LowerShift()
21677   case ISD::VSELECT:            return LowerVSELECT(Op, DAG);  in LowerOperation()
26739   if (N->getOpcode() == ISD::VSELECT && Cond.getOpcode() == ISD::SETCC &&  in combineSelect()
26800   if (N->getOpcode() == ISD::VSELECT && CondVT == VT) {  in combineSelect()
26850   if (N->getOpcode() == ISD::VSELECT && DCI.isBeforeLegalizeOps() &&  in combineSelect()
26869     if (!TLI.isOperationLegalOrCustom(ISD::VSELECT, VT))  in combineSelect()
26904           if (I->getOpcode() != ISD::VSELECT)  in combineSelect()
28411   Mask = DAG.getNode(ISD::VSELECT, DL, BlendVT, Mask, Y, X);  in combineLogicBlendIntoPBLENDV()
29892   auto SelectOpcode = VT.isVector() ? ISD::VSELECT : ISD::SELECT;  in combineFMinNumFMaxNum()
30665   if (Op0.getOpcode() == ISD::VSELECT) {  in detectSADPattern()
30668   } else if (Op1.getOpcode() == ISD::VSELECT) {  in detectSADPattern()
30951   case ISD::VSELECT:  in PerformDAGCombine()