Lines Matching refs:RegNumT

94   Variable *getPhysicalRegister(RegNumT RegNum,
96   const char *getRegName(RegNumT RegNum, Type Ty) const override;
116   const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override {  in getAliasesForRegister()
121   RegNumT getStackReg() const override { return RegARM32::Reg_sp; }  in getStackReg()
122   RegNumT getFrameReg() const override { return RegARM32::Reg_fp; }  in getFrameReg()
123   RegNumT getFrameOrStackReg() const override {  in getFrameOrStackReg()
126   RegNumT getReservedTmpReg() const { return RegARM32::Reg_ip; }  in getReservedTmpReg()
186   Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
188                     RegNumT RegNum = RegNumT());
189   Variable *legalizeToReg(Operand *From, RegNumT RegNum = RegNumT());
305   Variable *makeReg(Type Ty, RegNumT RegNum = RegNumT());
307   Variable *copyToReg(Operand *Src, RegNumT RegNum = RegNumT());
309                          RegNumT TmpRegNum = RegNumT());
312   Variable *makeVectorOfZeros(Type Ty, RegNumT RegNum = RegNumT());
315   makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation,
1205                               RegNumT ScratchRegNum);
1271     bool argInGPR(Type Ty, RegNumT *Reg);
1275     bool argInVFP(Type Ty, RegNumT *Reg);
1278     void discardUnavailableGPRsAndTheirAliases(CfgVector<RegNumT> *Regs);
1280     CfgVector<RegNumT> GPRArgs;
1281     CfgVector<RegNumT> I64Args;
1283     void discardUnavailableVFPRegs(CfgVector<RegNumT> *Regs);
1285     CfgVector<RegNumT> FP32Args;
1286     CfgVector<RegNumT> FP64Args;
1287     CfgVector<RegNumT> Vec128Args;