127 …ioaddr) outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr);udelay(5);outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SR…  argument
227 static u16 read_srom_word(long ioaddr, int offset);
229 static void dmfe_descriptor_init(struct nic *, unsigned long ioaddr);
278 	unsigned long ioaddr = BASE;  in dmfe_init_dm910x()  local
281 	outl(DM910X_RESET, ioaddr + DCR0);	/* RESET MAC */  in dmfe_init_dm910x()
283 	outl(db->cr0_data, ioaddr + DCR0);  in dmfe_init_dm910x()
294 	outl(0x180, ioaddr + DCR12);	/* Let bit 7 output port */  in dmfe_init_dm910x()
296 		outl(0x80, ioaddr + DCR12);	/* Issue RESET signal */  in dmfe_init_dm910x()
299 	outl(0x0, ioaddr + DCR12);	/* Clear RESET signal */  in dmfe_init_dm910x()
310 	dmfe_descriptor_init(nic, ioaddr);  in dmfe_init_dm910x()
313 	outl(virt_to_le32desc(&txd[0]), ioaddr + DCR4);	/* TX DESC address */  in dmfe_init_dm910x()
316 	outl(virt_to_le32desc(&rxd[0]), ioaddr + DCR3);	/* RX DESC address */  in dmfe_init_dm910x()
319 	update_cr6(db->cr6_data, ioaddr);  in dmfe_init_dm910x()
330 	outl(db->cr7_data, ioaddr + DCR7);  in dmfe_init_dm910x()
332 	outl(db->cr15_data, ioaddr + DCR15);  in dmfe_init_dm910x()
335 	update_cr6(db->cr6_data, ioaddr);  in dmfe_init_dm910x()
456 	if (pci->ioaddr == 0)  in dmfe_probe()
459 	BASE = pci->ioaddr;  in dmfe_probe()
500 	nic->ioaddr = pci->ioaddr;  in dmfe_probe()
513 static void dmfe_descriptor_init(struct nic *nic __unused, unsigned long ioaddr)  in dmfe_descriptor_init()  argument
520 	outl(virt_to_le32desc(&txd[0]), ioaddr + DCR4);	/* TX DESC address */  in dmfe_descriptor_init()
523 	outl(virt_to_le32desc(&rxd[0]), ioaddr + DCR3);	/* RX DESC address */  in dmfe_descriptor_init()
559 static void update_cr6(u32 cr6_data, unsigned long ioaddr)  in update_cr6()  argument
564 	outl(cr6_tmp, ioaddr + DCR6);  in update_cr6()
566 	outl(cr6_data, ioaddr + DCR6);  in update_cr6()
581 	unsigned long ioaddr = BASE + 0xc0;	/* ID Table */  in dm9132_id_table()  local
595 	outw(addrptr[0], ioaddr);  in dm9132_id_table()
596 	ioaddr += 4;  in dm9132_id_table()
597 	outw(addrptr[1], ioaddr);  in dm9132_id_table()
598 	ioaddr += 4;  in dm9132_id_table()
599 	outw(addrptr[2], ioaddr);  in dm9132_id_table()
600 	ioaddr += 4;  in dm9132_id_table()
616 	for (i = 0; i < 4; i++, ioaddr += 4)  in dm9132_id_table()
617 		outw(hash_table[i], ioaddr);  in dm9132_id_table()
661 static u16 read_srom_word(long ioaddr, int offset)  in read_srom_word()  argument
665 	long cr9_ioaddr = ioaddr + DCR9;  in read_srom_word()
883 	unsigned long ioaddr;  in phy_write()  local
886 		ioaddr = iobase + 0x80 + offset * 4;  in phy_write()
887 		outw(phy_data, ioaddr);  in phy_write()
890 		ioaddr = iobase + DCR9;  in phy_write()
894 			phy_write_1bit(ioaddr, PHY_DATA_1);  in phy_write()
897 		phy_write_1bit(ioaddr, PHY_DATA_0);  in phy_write()
898 		phy_write_1bit(ioaddr, PHY_DATA_1);  in phy_write()
901 		phy_write_1bit(ioaddr, PHY_DATA_0);  in phy_write()
902 		phy_write_1bit(ioaddr, PHY_DATA_1);  in phy_write()
906 			phy_write_1bit(ioaddr,  in phy_write()
912 			phy_write_1bit(ioaddr,  in phy_write()
917 		phy_write_1bit(ioaddr, PHY_DATA_1);  in phy_write()
918 		phy_write_1bit(ioaddr, PHY_DATA_0);  in phy_write()
922 			phy_write_1bit(ioaddr,  in phy_write()
938 	unsigned long ioaddr;  in phy_read()  local
942 		ioaddr = iobase + 0x80 + offset * 4;  in phy_read()
943 		phy_data = inw(ioaddr);  in phy_read()
946 		ioaddr = iobase + DCR9;  in phy_read()
950 			phy_write_1bit(ioaddr, PHY_DATA_1);  in phy_read()
953 		phy_write_1bit(ioaddr, PHY_DATA_0);  in phy_read()
954 		phy_write_1bit(ioaddr, PHY_DATA_1);  in phy_read()
957 		phy_write_1bit(ioaddr, PHY_DATA_1);  in phy_read()
958 		phy_write_1bit(ioaddr, PHY_DATA_0);  in phy_read()
962 			phy_write_1bit(ioaddr,  in phy_read()
968 			phy_write_1bit(ioaddr,  in phy_read()
973 		phy_read_1bit(ioaddr);  in phy_read()
978 			phy_data |= phy_read_1bit(ioaddr);  in phy_read()
990 static void phy_write_1bit(unsigned long ioaddr, u32 phy_data)  in phy_write_1bit()  argument
992 	outl(phy_data, ioaddr);	/* MII Clock Low */  in phy_write_1bit()
994 	outl(phy_data | MDCLKH, ioaddr);	/* MII Clock High */  in phy_write_1bit()
996 	outl(phy_data, ioaddr);	/* MII Clock Low */  in phy_write_1bit()
1005 static u16 phy_read_1bit(unsigned long ioaddr)  in phy_read_1bit()  argument
1009 	outl(0x50000, ioaddr);  in phy_read_1bit()
1011 	phy_data = (inl(ioaddr) >> 19) & 0x1;  in phy_read_1bit()
1012 	outl(0x40000, ioaddr);  in phy_read_1bit()