Lines Matching refs:IROp
276 static IRExpr* unop ( IROp op, IRExpr* a ) in unop()
281 static IRExpr* binop ( IROp op, IRExpr* a1, IRExpr* a2 ) in binop()
286 static IRExpr* triop ( IROp op, IRExpr* a1, IRExpr* a2, IRExpr* a3 ) in triop()
457 static IROp mkAND ( IRType ty ) { in mkAND()
465 static IROp mkOR ( IRType ty ) { in mkOR()
473 static IROp mkXOR ( IRType ty ) { in mkXOR()
481 static IROp mkSHL ( IRType ty ) { in mkSHL()
489 static IROp mkSHR ( IRType ty ) { in mkSHR()
497 static IROp mkSAR ( IRType ty ) { in mkSAR()
505 static IROp mkNOT ( IRType ty ) { in mkNOT()
513 static IROp mkADD ( IRType ty ) { in mkADD()
521 static IROp mkSUB ( IRType ty ) { in mkSUB()
529 static IROp mkADDF ( IRType ty ) { in mkADDF()
537 static IROp mkSUBF ( IRType ty ) { in mkSUBF()
545 static IROp mkMULF ( IRType ty ) { in mkMULF()
553 static IROp mkDIVF ( IRType ty ) { in mkDIVF()
561 static IROp mkNEGF ( IRType ty ) { in mkNEGF()
569 static IROp mkABSF ( IRType ty ) { in mkABSF()
577 static IROp mkSQRTF ( IRType ty ) { in mkSQRTF()
585 static IROp mkVecADD ( UInt size ) { in mkVecADD()
586 const IROp ops[4] in mkVecADD()
592 static IROp mkVecQADDU ( UInt size ) { in mkVecQADDU()
593 const IROp ops[4] in mkVecQADDU()
599 static IROp mkVecQADDS ( UInt size ) { in mkVecQADDS()
600 const IROp ops[4] in mkVecQADDS()
606 static IROp mkVecQADDEXTSUSATUU ( UInt size ) { in mkVecQADDEXTSUSATUU()
607 const IROp ops[4] in mkVecQADDEXTSUSATUU()
614 static IROp mkVecQADDEXTUSSATSS ( UInt size ) { in mkVecQADDEXTUSSATSS()
615 const IROp ops[4] in mkVecQADDEXTUSSATSS()
622 static IROp mkVecSUB ( UInt size ) { in mkVecSUB()
623 const IROp ops[4] in mkVecSUB()
629 static IROp mkVecQSUBU ( UInt size ) { in mkVecQSUBU()
630 const IROp ops[4] in mkVecQSUBU()
636 static IROp mkVecQSUBS ( UInt size ) { in mkVecQSUBS()
637 const IROp ops[4] in mkVecQSUBS()
643 static IROp mkVecSARN ( UInt size ) { in mkVecSARN()
644 const IROp ops[4] in mkVecSARN()
650 static IROp mkVecSHRN ( UInt size ) { in mkVecSHRN()
651 const IROp ops[4] in mkVecSHRN()
657 static IROp mkVecSHLN ( UInt size ) { in mkVecSHLN()
658 const IROp ops[4] in mkVecSHLN()
664 static IROp mkVecCATEVENLANES ( UInt size ) { in mkVecCATEVENLANES()
665 const IROp ops[4] in mkVecCATEVENLANES()
672 static IROp mkVecCATODDLANES ( UInt size ) { in mkVecCATODDLANES()
673 const IROp ops[4] in mkVecCATODDLANES()
680 static IROp mkVecINTERLEAVELO ( UInt size ) { in mkVecINTERLEAVELO()
681 const IROp ops[4] in mkVecINTERLEAVELO()
688 static IROp mkVecINTERLEAVEHI ( UInt size ) { in mkVecINTERLEAVEHI()
689 const IROp ops[4] in mkVecINTERLEAVEHI()
696 static IROp mkVecMAXU ( UInt size ) { in mkVecMAXU()
697 const IROp ops[4] in mkVecMAXU()
703 static IROp mkVecMAXS ( UInt size ) { in mkVecMAXS()
704 const IROp ops[4] in mkVecMAXS()
710 static IROp mkVecMINU ( UInt size ) { in mkVecMINU()
711 const IROp ops[4] in mkVecMINU()
717 static IROp mkVecMINS ( UInt size ) { in mkVecMINS()
718 const IROp ops[4] in mkVecMINS()
724 static IROp mkVecMUL ( UInt size ) { in mkVecMUL()
725 const IROp ops[4] in mkVecMUL()
731 static IROp mkVecMULLU ( UInt sizeNarrow ) { in mkVecMULLU()
732 const IROp ops[4] in mkVecMULLU()
738 static IROp mkVecMULLS ( UInt sizeNarrow ) { in mkVecMULLS()
739 const IROp ops[4] in mkVecMULLS()
745 static IROp mkVecQDMULLS ( UInt sizeNarrow ) { in mkVecQDMULLS()
746 const IROp ops[4] in mkVecQDMULLS()
752 static IROp mkVecCMPEQ ( UInt size ) { in mkVecCMPEQ()
753 const IROp ops[4] in mkVecCMPEQ()
759 static IROp mkVecCMPGTU ( UInt size ) { in mkVecCMPGTU()
760 const IROp ops[4] in mkVecCMPGTU()
766 static IROp mkVecCMPGTS ( UInt size ) { in mkVecCMPGTS()
767 const IROp ops[4] in mkVecCMPGTS()
773 static IROp mkVecABS ( UInt size ) { in mkVecABS()
774 const IROp ops[4] in mkVecABS()
780 static IROp mkVecZEROHIxxOFV128 ( UInt size ) { in mkVecZEROHIxxOFV128()
781 const IROp ops[4] in mkVecZEROHIxxOFV128()
796 static IROp mkVecQDMULHIS ( UInt size ) { in mkVecQDMULHIS()
797 const IROp ops[4] in mkVecQDMULHIS()
803 static IROp mkVecQRDMULHIS ( UInt size ) { in mkVecQRDMULHIS()
804 const IROp ops[4] in mkVecQRDMULHIS()
810 static IROp mkVecQANDUQSH ( UInt size ) { in mkVecQANDUQSH()
811 const IROp ops[4] in mkVecQANDUQSH()
818 static IROp mkVecQANDSQSH ( UInt size ) { in mkVecQANDSQSH()
819 const IROp ops[4] in mkVecQANDSQSH()
826 static IROp mkVecQANDUQRSH ( UInt size ) { in mkVecQANDUQRSH()
827 const IROp ops[4] in mkVecQANDUQRSH()
834 static IROp mkVecQANDSQRSH ( UInt size ) { in mkVecQANDSQRSH()
835 const IROp ops[4] in mkVecQANDSQRSH()
842 static IROp mkVecSHU ( UInt size ) { in mkVecSHU()
843 const IROp ops[4] in mkVecSHU()
849 static IROp mkVecSHS ( UInt size ) { in mkVecSHS()
850 const IROp ops[4] in mkVecSHS()
856 static IROp mkVecRSHU ( UInt size ) { in mkVecRSHU()
857 const IROp ops[4] in mkVecRSHU()
863 static IROp mkVecRSHS ( UInt size ) { in mkVecRSHS()
864 const IROp ops[4] in mkVecRSHS()
870 static IROp mkVecNARROWUN ( UInt sizeNarrow ) { in mkVecNARROWUN()
871 const IROp ops[4] in mkVecNARROWUN()
878 static IROp mkVecQNARROWUNSU ( UInt sizeNarrow ) { in mkVecQNARROWUNSU()
879 const IROp ops[4] in mkVecQNARROWUNSU()
886 static IROp mkVecQNARROWUNSS ( UInt sizeNarrow ) { in mkVecQNARROWUNSS()
887 const IROp ops[4] in mkVecQNARROWUNSS()
894 static IROp mkVecQNARROWUNUU ( UInt sizeNarrow ) { in mkVecQNARROWUNUU()
895 const IROp ops[4] in mkVecQNARROWUNUU()
902 static IROp mkVecQANDqshrNNARROWUU ( UInt sizeNarrow ) { in mkVecQANDqshrNNARROWUU()
903 const IROp ops[4] in mkVecQANDqshrNNARROWUU()
910 static IROp mkVecQANDqsarNNARROWSS ( UInt sizeNarrow ) { in mkVecQANDqsarNNARROWSS()
911 const IROp ops[4] in mkVecQANDqsarNNARROWSS()
918 static IROp mkVecQANDqsarNNARROWSU ( UInt sizeNarrow ) { in mkVecQANDqsarNNARROWSU()
919 const IROp ops[4] in mkVecQANDqsarNNARROWSU()
926 static IROp mkVecQANDqrshrNNARROWUU ( UInt sizeNarrow ) { in mkVecQANDqrshrNNARROWUU()
927 const IROp ops[4] in mkVecQANDqrshrNNARROWUU()
934 static IROp mkVecQANDqrsarNNARROWSS ( UInt sizeNarrow ) { in mkVecQANDqrsarNNARROWSS()
935 const IROp ops[4] in mkVecQANDqrsarNNARROWSS()
942 static IROp mkVecQANDqrsarNNARROWSU ( UInt sizeNarrow ) { in mkVecQANDqrsarNNARROWSU()
943 const IROp ops[4] in mkVecQANDqrsarNNARROWSU()
950 static IROp mkVecQSHLNSATUU ( UInt size ) { in mkVecQSHLNSATUU()
951 const IROp ops[4] in mkVecQSHLNSATUU()
958 static IROp mkVecQSHLNSATSS ( UInt size ) { in mkVecQSHLNSATSS()
959 const IROp ops[4] in mkVecQSHLNSATSS()
966 static IROp mkVecQSHLNSATSU ( UInt size ) { in mkVecQSHLNSATSU()
967 const IROp ops[4] in mkVecQSHLNSATSU()
974 static IROp mkVecADDF ( UInt size ) { in mkVecADDF()
975 const IROp ops[4] in mkVecADDF()
981 static IROp mkVecMAXF ( UInt size ) { in mkVecMAXF()
982 const IROp ops[4] in mkVecMAXF()
988 static IROp mkVecMINF ( UInt size ) { in mkVecMINF()
989 const IROp ops[4] in mkVecMINF()
2509 const IROp ops64[4] = { Iop_And64, Iop_Or64, Iop_Xor64, Iop_And64 }; in dis_ARM64_data_processing_immediate()
2510 const IROp ops32[4] = { Iop_And32, Iop_Or32, Iop_Xor32, Iop_And32 }; in dis_ARM64_data_processing_immediate()
2830 IROp op = isSUB ? mkSUB(ty) : mkADD(ty); in dis_ARM64_data_processing_register()
2878 IROp op = isSUB ? mkSUB(ty) : mkADD(ty); in dis_ARM64_data_processing_register()
2882 IROp xorOp = is64 ? Iop_Xor64 : Iop_Xor32; in dis_ARM64_data_processing_register()
2937 IROp op = Iop_INVALID; in dis_ARM64_data_processing_register()
3401 IROp iop = Iop_INVALID; in dis_ARM64_data_processing_register()
3417 IROp opSHL = mkSHL(ty); in dis_ARM64_data_processing_register()
3418 IROp opSHR = mkSHR(ty); in dis_ARM64_data_processing_register()
3419 IROp opOR = mkOR(ty); in dis_ARM64_data_processing_register()
4253 void math_get_doubler_and_halver ( /*OUT*/IROp* doubler, in math_get_doubler_and_halver()
4254 /*OUT*/IROp* halver, in math_get_doubler_and_halver()
4294 IROp doubler = Iop_INVALID, halver = Iop_INVALID; in math_INTERLEAVE2_64()
4325 IROp doubler = Iop_INVALID, halver = Iop_INVALID; in math_INTERLEAVE3_64()
4361 IROp doubler = Iop_INVALID, halver = Iop_INVALID; in math_INTERLEAVE4_64()
4407 IROp doubler = Iop_INVALID, halver = Iop_INVALID; in math_DEINTERLEAVE2_64()
4439 IROp doubler = Iop_INVALID, halver = Iop_INVALID; in math_DEINTERLEAVE3_64()
4475 IROp doubler = Iop_INVALID, halver = Iop_INVALID; in math_DEINTERLEAVE4_64()
7502 static IRTemp math_FOLDV ( IRTemp src, IROp op ) in math_FOLDV()
7801 IRTemp math_BINARY_WIDENING_V128 ( Bool is2, IROp opI64x2toV128, in math_BINARY_WIDENING_V128()
7805 IROp slice = is2 ? Iop_V128HIto64 : Iop_V128to64; in math_BINARY_WIDENING_V128()
7891 IROp opSAR = mkVecSARN(sizeNarrow+1); in math_WIDEN_EVEN_OR_ODD_LANES()
7892 IROp opSHR = mkVecSHRN(sizeNarrow+1); in math_WIDEN_EVEN_OR_ODD_LANES()
7893 IROp opSHL = mkVecSHLN(sizeNarrow+1); in math_WIDEN_EVEN_OR_ODD_LANES()
7894 IROp opSxR = zWiden ? opSHR : opSAR; in math_WIDEN_EVEN_OR_ODD_LANES()
7938 IROp ops[4] = { Iop_INVALID, Iop_INVALID, Iop_INVALID, Iop_INVALID }; in math_DUP_VEC_ELEM()
8148 IROp mulOp = isU ? mkVecMULLU(size) : mkVecMULLS(size); in math_MULL_ACC()
8149 IROp accOp = (mas == 'a') ? mkVecADD(size+1) in math_MULL_ACC()
8232 IROp opMulls = mkVecMULLS(sizeNarrow); in math_MULLS()
8299 IROp qop = mkVecQSHLNSATUU(size); in math_QSHL_IMM()
8319 IROp qop = mkVecQSHLNSATSS(size); in math_QSHL_IMM()
8347 IROp qop = mkVecQSHLNSATSU(size); in math_QSHL_IMM()
8378 IROp opSHR = isU ? mkVecSHRN(size) : mkVecSARN(size); in math_RHADD()
8379 IROp opADD = mkVecADD(size); in math_RHADD()
8424 void updateQCFLAGwithDifferenceZHI ( IRTemp qres, IRTemp nres, IROp opZHI ) in updateQCFLAGwithDifferenceZHI()
8671 IROp op = isUZP1 ? mkVecCATEVENLANES(size) in dis_AdvSIMD_ZIP_UZP_TRN()
8698 IROp op1 = isTRN1 ? mkVecCATEVENLANES(size) in dis_AdvSIMD_ZIP_UZP_TRN()
8700 IROp op2 = mkVecINTERLEAVEHI(size); in dis_AdvSIMD_ZIP_UZP_TRN()
8721 IROp op = isZIP1 ? mkVecINTERLEAVELO(size) in dis_AdvSIMD_ZIP_UZP_TRN()
8823 const IROp opMAXS[3] in dis_AdvSIMD_across_lanes()
8825 const IROp opMAXU[3] in dis_AdvSIMD_across_lanes()
8827 const IROp opMINS[3] in dis_AdvSIMD_across_lanes()
8829 const IROp opMINU[3] in dis_AdvSIMD_across_lanes()
8831 const IROp opADD[3] in dis_AdvSIMD_across_lanes()
8834 IROp op = Iop_INVALID; in dis_AdvSIMD_across_lanes()
8880 IROp opMXX = (isMIN ? mkVecMINF : mkVecMAXF)(2); in dis_AdvSIMD_across_lanes()
9439 IROp opZHI = mkVecZEROHIxxOFV128(isD ? 3 : 2); in dis_AdvSIMD_scalar_pairwise()
9440 IROp opADD = mkVecADDF(isD ? 3 : 2); in dis_AdvSIMD_scalar_pairwise()
9465 IROp opZHI = mkVecZEROHIxxOFV128(isD ? 3 : 2); in dis_AdvSIMD_scalar_pairwise()
9466 IROp opMXX = (isMIN ? mkVecMINF : mkVecMAXF)(isD ? 3 : 2); in dis_AdvSIMD_scalar_pairwise()
9517 IROp op = isU ? Iop_ShrN64x2 : Iop_SarN64x2; in dis_AdvSIMD_scalar_shift_by_imm()
9550 IROp op = isU ? Iop_Rsh64Ux2 : Iop_Rsh64Sx2; in dis_AdvSIMD_scalar_shift_by_imm()
9671 IROp op = Iop_INVALID; in dis_AdvSIMD_scalar_shift_by_imm()
9729 IROp opMUL = isD ? Iop_MulF64 : Iop_MulF32; in dis_AdvSIMD_scalar_shift_by_imm()
9730 IROp opCVT = isU ? (isD ? Iop_I64UtoF64 : Iop_I32UtoF32) in dis_AdvSIMD_scalar_shift_by_imm()
9767 IROp opMUL = isD ? Iop_MulF64 : Iop_MulF32; in dis_AdvSIMD_scalar_shift_by_imm()
9768 IROp opCVT = isU ? (isD ? Iop_F64toI64U : Iop_F32toI32U) in dis_AdvSIMD_scalar_shift_by_imm()
9844 IROp opZHI = mkVecZEROHIxxOFV128(size+1); in dis_AdvSIMD_scalar_three_different()
9894 IROp qop = Iop_INVALID; in dis_AdvSIMD_scalar_three_same()
9895 IROp nop = Iop_INVALID; in dis_AdvSIMD_scalar_three_same()
9964 IROp op = isR ? (isU ? mkVecRSHU(size) : mkVecRSHS(size)) in dis_AdvSIMD_scalar_three_same()
9984 IROp op = isR ? (isU ? mkVecQANDUQRSH(size) : mkVecQANDSQRSH(size)) in dis_AdvSIMD_scalar_three_same()
10105 IROp opCMP = isGE ? (isD ? Iop_CmpLE64Fx2 : Iop_CmpLE32Fx4) in dis_AdvSIMD_scalar_three_same()
10121 IROp opCMP = isD ? Iop_CmpLT64Fx2 : Iop_CmpLT32Fx4; in dis_AdvSIMD_scalar_three_same()
10137 IROp opCMP = isGT ? (isD ? Iop_CmpLT64Fx2 : Iop_CmpLT32Fx4) in dis_AdvSIMD_scalar_three_same()
10139 IROp opABS = isD ? Iop_Abs64Fx2 : Iop_Abs32Fx4; in dis_AdvSIMD_scalar_three_same()
10155 IROp op = isSQRT ? (isD ? Iop_RSqrtStep64Fx2 : Iop_RSqrtStep32Fx4) in dis_AdvSIMD_scalar_three_same()
10200 IROp qop = isUSQADD ? mkVecQADDEXTSUSATUU(size) in dis_AdvSIMD_scalar_two_reg_misc()
10202 IROp nop = mkVecADD(size); in dis_AdvSIMD_scalar_two_reg_misc()
10305 IROp opCmpEQ = isD ? Iop_CmpEQ64Fx2 : Iop_CmpEQ32Fx4; in dis_AdvSIMD_scalar_two_reg_misc()
10306 IROp opCmpLE = isD ? Iop_CmpLE64Fx2 : Iop_CmpLE32Fx4; in dis_AdvSIMD_scalar_two_reg_misc()
10307 IROp opCmpLT = isD ? Iop_CmpLT64Fx2 : Iop_CmpLT32Fx4; in dis_AdvSIMD_scalar_two_reg_misc()
10308 IROp opCmp = Iop_INVALID; in dis_AdvSIMD_scalar_two_reg_misc()
10337 IROp opN = Iop_INVALID; in dis_AdvSIMD_scalar_two_reg_misc()
10411 IROp cvt = Iop_INVALID; in dis_AdvSIMD_scalar_two_reg_misc()
10438 IROp iop = isU ? (isD ? Iop_I64UtoF64 : Iop_I32UtoF32) in dis_AdvSIMD_scalar_two_reg_misc()
10456 IROp op = isSQRT ? (isD ? Iop_RSqrtEst64Fx2 : Iop_RSqrtEst32Fx4) in dis_AdvSIMD_scalar_two_reg_misc()
10471 IROp op = isD ? Iop_RecpExpF64 : Iop_RecpExpF32; in dis_AdvSIMD_scalar_two_reg_misc()
10529 IROp opADD = isD ? Iop_Add64Fx2 : Iop_Add32Fx4; in dis_AdvSIMD_scalar_x_indexed_element()
10530 IROp opSUB = isD ? Iop_Sub64Fx2 : Iop_Sub32Fx4; in dis_AdvSIMD_scalar_x_indexed_element()
10531 IROp opMUL = isD ? Iop_Mul64Fx2 : Iop_Mul32Fx4; in dis_AdvSIMD_scalar_x_indexed_element()
10563 IROp opMUL = isD ? Iop_Mul64Fx2 : Iop_Mul32Fx4; in dis_AdvSIMD_scalar_x_indexed_element()
10616 IROp opZHI = mkVecZEROHIxxOFV128(size+1); in dis_AdvSIMD_scalar_x_indexed_element()
10657 IROp opZHI = mkVecZEROHIxxOFV128(size); in dis_AdvSIMD_scalar_x_indexed_element()
10713 IROp op = isU ? mkVecSHRN(size) : mkVecSARN(size); in dis_AdvSIMD_shift_by_immediate()
10762 IROp op = isU ? mkVecRSHU(size) : mkVecRSHS(size); in dis_AdvSIMD_shift_by_immediate()
10845 IROp op = mkVecSHLN(size); in dis_AdvSIMD_shift_by_immediate()
10954 IROp op = Iop_INVALID; in dis_AdvSIMD_shift_by_immediate()
11086 IROp opMUL = isD ? Iop_MulF64 : Iop_MulF32; in dis_AdvSIMD_shift_by_immediate()
11087 IROp opCVT = isU ? (isD ? Iop_I64UtoF64 : Iop_I32UtoF32) in dis_AdvSIMD_shift_by_immediate()
11132 IROp opMUL = isD ? Iop_MulF64 : Iop_MulF32; in dis_AdvSIMD_shift_by_immediate()
11133 IROp opCVT = isU ? (isD ? Iop_F64toI64U : Iop_F32toI32U) in dis_AdvSIMD_shift_by_immediate()
11406 IROp slice in dis_AdvSIMD_three_different()
11480 IROp opADDSUB = isADD ? mkVecADD(size+1) : mkVecSUB(size+1); in dis_AdvSIMD_three_same()
11481 IROp opSxR = isU ? mkVecSHRN(size+1) : mkVecSARN(size+1); in dis_AdvSIMD_three_same()
11523 IROp qop = Iop_INVALID; in dis_AdvSIMD_three_same()
11524 IROp nop = Iop_INVALID; in dis_AdvSIMD_three_same()
11583 const IROp opXOR = Iop_XorV128; in dis_AdvSIMD_three_same()
11584 const IROp opAND = Iop_AndV128; in dis_AdvSIMD_three_same()
11585 const IROp opNOT = Iop_NotV128; in dis_AdvSIMD_three_same()
11666 IROp op = isR ? (isU ? mkVecRSHU(size) : mkVecRSHS(size)) in dis_AdvSIMD_three_same()
11687 IROp op = isR ? (isU ? mkVecQANDUQRSH(size) : mkVecQANDSQRSH(size)) in dis_AdvSIMD_three_same()
11724 IROp op = isMAX ? (isU ? mkVecMAXU(size) : mkVecMAXS(size)) in dis_AdvSIMD_three_same()
11764 IROp op = isSUB ? mkVecSUB(size) : mkVecADD(size); in dis_AdvSIMD_three_same()
11801 IROp opMUL = mkVecMUL(size); in dis_AdvSIMD_three_same()
11802 IROp opADDSUB = isMLS ? mkVecSUB(size) : mkVecADD(size); in dis_AdvSIMD_three_same()
11822 const IROp opsPMUL[4] in dis_AdvSIMD_three_same()
11824 IROp opMUL = isPMUL ? opsPMUL[size] : mkVecMUL(size); in dis_AdvSIMD_three_same()
11847 IROp op = isMAX ? (isU ? mkVecMAXU(size) : mkVecMAXS(size)) in dis_AdvSIMD_three_same()
11884 IROp opZHI = bitQ == 0 ? Iop_ZeroHI64ofV128 : Iop_INVALID; in dis_AdvSIMD_three_same()
11930 IROp opMXX = (isMIN ? mkVecMINF : mkVecMAXF)(isD ? X11 : X10); in dis_AdvSIMD_three_same()
11947 IROp opADD = isD ? Iop_Add64Fx2 : Iop_Add32Fx4; in dis_AdvSIMD_three_same()
11948 IROp opSUB = isD ? Iop_Sub64Fx2 : Iop_Sub32Fx4; in dis_AdvSIMD_three_same()
11949 IROp opMUL = isD ? Iop_Mul64Fx2 : Iop_Mul32Fx4; in dis_AdvSIMD_three_same()
11971 const IROp ops[4] in dis_AdvSIMD_three_same()
11973 IROp op = ops[size]; in dis_AdvSIMD_three_same()
11990 IROp opSUB = isD ? Iop_Sub64Fx2 : Iop_Sub32Fx4; in dis_AdvSIMD_three_same()
11991 IROp opABS = isD ? Iop_Abs64Fx2 : Iop_Abs32Fx4; in dis_AdvSIMD_three_same()
12029 IROp opCMP = isGE ? (isD ? Iop_CmpLE64Fx2 : Iop_CmpLE32Fx4) in dis_AdvSIMD_three_same()
12045 IROp opCMP = isD ? Iop_CmpLT64Fx2 : Iop_CmpLT32Fx4; in dis_AdvSIMD_three_same()
12061 IROp opCMP = isGT ? (isD ? Iop_CmpLT64Fx2 : Iop_CmpLT32Fx4) in dis_AdvSIMD_three_same()
12063 IROp opABS = isD ? Iop_Abs64Fx2 : Iop_Abs32Fx4; in dis_AdvSIMD_three_same()
12085 IROp opMXX = (isMIN ? mkVecMINF : mkVecMAXF)(isD ? 3 : 2); in dis_AdvSIMD_three_same()
12134 const IROp ops[2] = { Iop_Div32Fx4, Iop_Div64Fx2 }; in dis_AdvSIMD_three_same()
12135 IROp op = ops[size]; in dis_AdvSIMD_three_same()
12154 IROp op = isSQRT ? (isD ? Iop_RSqrtStep64Fx2 : Iop_RSqrtStep32Fx4) in dis_AdvSIMD_three_same()
12196 const IROp iops[3] = { Iop_Reverse8sIn64_x2, in dis_AdvSIMD_two_reg_misc()
12213 IROp iop = isH ? Iop_Reverse16sIn32_x4 : Iop_Reverse8sIn32_x4; in dis_AdvSIMD_two_reg_misc()
12272 IROp qop = isUSQADD ? mkVecQADDEXTSUSATUU(size) in dis_AdvSIMD_two_reg_misc()
12274 IROp nop = mkVecADD(size); in dis_AdvSIMD_two_reg_misc()
12300 const IROp opsCLS[3] = { Iop_Cls8x16, Iop_Cls16x8, Iop_Cls32x4 }; in dis_AdvSIMD_two_reg_misc()
12301 const IROp opsCLZ[3] = { Iop_Clz8x16, Iop_Clz16x8, Iop_Clz32x4 }; in dis_AdvSIMD_two_reg_misc()
12363 IROp opGTS = mkVecCMPGTS(size); in dis_AdvSIMD_two_reg_misc()
12444 IROp opCmpEQ = isD ? Iop_CmpEQ64Fx2 : Iop_CmpEQ32Fx4; in dis_AdvSIMD_two_reg_misc()
12445 IROp opCmpLE = isD ? Iop_CmpLE64Fx2 : Iop_CmpLE32Fx4; in dis_AdvSIMD_two_reg_misc()
12446 IROp opCmpLT = isD ? Iop_CmpLT64Fx2 : Iop_CmpLT32Fx4; in dis_AdvSIMD_two_reg_misc()
12447 IROp opCmp = Iop_INVALID; in dis_AdvSIMD_two_reg_misc()
12474 IROp op = isFNEG ? (size == X10 ? Iop_Neg32Fx4 : Iop_Neg64Fx2) in dis_AdvSIMD_two_reg_misc()
12490 IROp opN = mkVecNARROWUN(size); in dis_AdvSIMD_two_reg_misc()
12510 IROp opN = Iop_INVALID; in dis_AdvSIMD_two_reg_misc()
12543 IROp opINT = is2 ? mkVecINTERLEAVEHI(size) : mkVecINTERLEAVELO(size); in dis_AdvSIMD_two_reg_misc()
12544 IROp opSHL = mkVecSHLN(size+1); in dis_AdvSIMD_two_reg_misc()
12562 IROp opCvt = size == X00 ? Iop_F32toF16 : Iop_F64toF32; in dis_AdvSIMD_two_reg_misc()
12588 IROp opCvt = Iop_F64toF32; in dis_AdvSIMD_two_reg_misc()
12612 IROp opCvt = size == X00 ? Iop_F16toF32 : Iop_F32toF64; in dis_AdvSIMD_two_reg_misc()
12674 IROp opRND = isD ? Iop_RoundF64toInt : Iop_RoundF32toInt; in dis_AdvSIMD_two_reg_misc()
12726 IROp cvt = Iop_INVALID; in dis_AdvSIMD_two_reg_misc()
12756 IROp op = isREC ? Iop_RecipEst32Ux4 : Iop_RSqrtEst32Ux4; in dis_AdvSIMD_two_reg_misc()
12786 IROp iop = isU ? (isF64 ? Iop_I64UtoF64 : Iop_I32UtoF32) in dis_AdvSIMD_two_reg_misc()
12810 IROp op = isSQRT ? (isD ? Iop_RSqrtEst64Fx2 : Iop_RSqrtEst32Fx4) in dis_AdvSIMD_two_reg_misc()
12825 IROp op = isD ? Iop_Sqrt64Fx2 : Iop_Sqrt32Fx4; in dis_AdvSIMD_two_reg_misc()
12886 IROp opADD = isD ? Iop_Add64Fx2 : Iop_Add32Fx4; in dis_AdvSIMD_vector_x_indexed_elem()
12887 IROp opSUB = isD ? Iop_Sub64Fx2 : Iop_Sub32Fx4; in dis_AdvSIMD_vector_x_indexed_elem()
12888 IROp opMUL = isD ? Iop_Mul64Fx2 : Iop_Mul32Fx4; in dis_AdvSIMD_vector_x_indexed_elem()
12955 IROp opMUL = mkVecMUL(size); in dis_AdvSIMD_vector_x_indexed_elem()
12956 IROp opADD = mkVecADD(size); in dis_AdvSIMD_vector_x_indexed_elem()
12957 IROp opSUB = mkVecSUB(size); in dis_AdvSIMD_vector_x_indexed_elem()
13118 IROp opZHI = bitQ == 0 ? Iop_ZeroHI64ofV128 : Iop_INVALID; in dis_AdvSIMD_vector_x_indexed_elem()
13812 IROp iop = Iop_INVALID; in dis_AdvSIMD_fp_data_proc_2_source()
13844 IROp iop = mkMULF(ity); in dis_AdvSIMD_fp_data_proc_2_source()
13845 IROp iopn = mkNEGF(ity); in dis_AdvSIMD_fp_data_proc_2_source()
13907 IROp opADD = mkADDF(ity); in dis_AdvSIMD_fp_data_proc_3_source()
13908 IROp opSUB = mkSUBF(ity); in dis_AdvSIMD_fp_data_proc_3_source()
13909 IROp opMUL = mkMULF(ity); in dis_AdvSIMD_fp_data_proc_3_source()
13910 IROp opNEG = mkNEGF(ity); in dis_AdvSIMD_fp_data_proc_3_source()
14021 IROp opMUL = isF64 ? Iop_MulF64 : Iop_MulF32; in dis_AdvSIMD_fp_to_from_fixedp_conv()
14023 const IROp ops[8] in dis_AdvSIMD_fp_to_from_fixedp_conv()
14072 IROp opMUL = isF64 ? Iop_MulF64 : Iop_MulF32; in dis_AdvSIMD_fp_to_from_fixedp_conv()
14074 const IROp ops[8] in dis_AdvSIMD_fp_to_from_fixedp_conv()
14173 const IROp iops[8] in dis_AdvSIMD_fp_to_from_int_conv()
14176 IROp iop = iops[ix]; in dis_AdvSIMD_fp_to_from_int_conv()
14256 const IROp ops[8] in dis_AdvSIMD_fp_to_from_int_conv()