Lines Matching refs:laneNo
1416 static Int offsetQRegLane ( UInt qregNo, IRType laneTy, UInt laneNo ) in offsetQRegLane() argument
1434 UInt minOff = laneNo * laneSzB; in offsetQRegLane()
1541 static void putQRegLane ( UInt qregNo, UInt laneNo, IRExpr* e ) in putQRegLane() argument
1544 Int off = offsetQRegLane(qregNo, laneTy, laneNo); in putQRegLane()
1558 static IRExpr* getQRegLane ( UInt qregNo, UInt laneNo, IRType laneTy ) in getQRegLane() argument
1560 Int off = offsetQRegLane(qregNo, laneTy, laneNo); in getQRegLane()
7928 IRTemp math_DUP_VEC_ELEM ( IRExpr* src, UInt size, UInt laneNo ) in math_DUP_VEC_ELEM() argument
7936 UInt ix = laneNo << size; in math_DUP_VEC_ELEM()
7984 IRTemp handle_DUP_VEC_ELEM ( /*OUT*/UInt* laneNo, in handle_DUP_VEC_ELEM() argument
7988 *laneNo = 0; in handle_DUP_VEC_ELEM()
7993 *laneNo = (imm5 >> 1) & 15; in handle_DUP_VEC_ELEM()
7998 *laneNo = (imm5 >> 2) & 7; in handle_DUP_VEC_ELEM()
8003 *laneNo = (imm5 >> 3) & 3; in handle_DUP_VEC_ELEM()
8008 *laneNo = (imm5 >> 4) & 1; in handle_DUP_VEC_ELEM()
8017 return math_DUP_VEC_ELEM(srcV, *laneSzLg2, *laneNo); in handle_DUP_VEC_ELEM()
8921 UInt laneNo = 0; in dis_AdvSIMD_copy() local
8924 IRTemp res = handle_DUP_VEC_ELEM(&laneNo, &laneSzLg2, &laneCh, in dis_AdvSIMD_copy()
8933 nameQReg128(dd), arT, nameQReg128(nn), laneCh, laneNo); in dis_AdvSIMD_copy()
8999 UInt laneNo = 16; in dis_AdvSIMD_copy() local
9003 laneNo = (imm5 >> 1) & 15; in dis_AdvSIMD_copy()
9008 laneNo = (imm5 >> 2) & 7; in dis_AdvSIMD_copy()
9013 laneNo = (imm5 >> 3) & 3; in dis_AdvSIMD_copy()
9018 laneNo = (imm5 >> 4) & 1; in dis_AdvSIMD_copy()
9023 vassert(laneNo < 16); in dis_AdvSIMD_copy()
9024 putQRegLane(dd, laneNo, src); in dis_AdvSIMD_copy()
9026 nameQReg128(dd), ts, laneNo, nameIReg64orZR(nn)); in dis_AdvSIMD_copy()
9063 UInt laneNo = 16; /* invalid */ in dis_AdvSIMD_copy() local
9067 laneNo = (imm5 >> 1) & 15; in dis_AdvSIMD_copy()
9068 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8); in dis_AdvSIMD_copy()
9074 laneNo = (imm5 >> 1) & 15; in dis_AdvSIMD_copy()
9075 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I8); in dis_AdvSIMD_copy()
9081 laneNo = (imm5 >> 2) & 7; in dis_AdvSIMD_copy()
9082 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16); in dis_AdvSIMD_copy()
9088 laneNo = (imm5 >> 2) & 7; in dis_AdvSIMD_copy()
9089 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I16); in dis_AdvSIMD_copy()
9095 laneNo = (imm5 >> 3) & 3; in dis_AdvSIMD_copy()
9096 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32); in dis_AdvSIMD_copy()
9102 laneNo = (imm5 >> 3) & 3; in dis_AdvSIMD_copy()
9103 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I32); in dis_AdvSIMD_copy()
9109 laneNo = (imm5 >> 4) & 1; in dis_AdvSIMD_copy()
9110 IRExpr* lane = getQRegLane(nn, laneNo, Ity_I64); in dis_AdvSIMD_copy()
9117 vassert(laneNo < 16); in dis_AdvSIMD_copy()
9121 nameQReg128(nn), arTs, laneNo); in dis_AdvSIMD_copy()
9359 UInt laneNo = 16; /* invalid */ in dis_AdvSIMD_scalar_copy() local
9362 laneNo = (imm5 >> 1) & 15; in dis_AdvSIMD_scalar_copy()
9364 assign(w0, unop(Iop_8Uto64, getQRegLane(nn, laneNo, laneTy))); in dis_AdvSIMD_scalar_copy()
9368 laneNo = (imm5 >> 2) & 7; in dis_AdvSIMD_scalar_copy()
9370 assign(w0, unop(Iop_16Uto64, getQRegLane(nn, laneNo, laneTy))); in dis_AdvSIMD_scalar_copy()
9374 laneNo = (imm5 >> 3) & 3; in dis_AdvSIMD_scalar_copy()
9376 assign(w0, unop(Iop_32Uto64, getQRegLane(nn, laneNo, laneTy))); in dis_AdvSIMD_scalar_copy()
9380 laneNo = (imm5 >> 4) & 1; in dis_AdvSIMD_scalar_copy()
9382 assign(w0, getQRegLane(nn, laneNo, laneTy)); in dis_AdvSIMD_scalar_copy()
9389 vassert(laneNo < 16); in dis_AdvSIMD_scalar_copy()
9392 nameQRegLO(dd, laneTy), nameQReg128(nn), arTs, laneNo); in dis_AdvSIMD_scalar_copy()