Lines Matching refs:Binop
868 && (e->Iex.Binop.op == Iop_Add64 || e->Iex.Binop.op == Iop_Sub64) in iselIntExpr_AMode_wrk()
869 && e->Iex.Binop.arg2->tag == Iex_Const in iselIntExpr_AMode_wrk()
870 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64) { in iselIntExpr_AMode_wrk()
871 Long simm = (Long)e->Iex.Binop.arg2->Iex.Const.con->Ico.U64; in iselIntExpr_AMode_wrk()
878 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
879 if (e->Iex.Binop.op == Iop_Sub64) simm = -simm; in iselIntExpr_AMode_wrk()
886 && e->Iex.Binop.op == Iop_Add64 in iselIntExpr_AMode_wrk()
887 && e->Iex.Binop.arg2->tag == Iex_Const in iselIntExpr_AMode_wrk()
888 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64) { in iselIntExpr_AMode_wrk()
889 ULong uimm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U64; in iselIntExpr_AMode_wrk()
893 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
900 && e->Iex.Binop.op == Iop_Add64) { in iselIntExpr_AMode_wrk()
901 HReg reg1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
902 HReg reg2 = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_AMode_wrk()
1379 && (e->Iex.Binop.op == Iop_CmpEQ64 in iselCondCode_wrk()
1380 || e->Iex.Binop.op == Iop_CmpNE64 in iselCondCode_wrk()
1381 || e->Iex.Binop.op == Iop_CmpLT64S in iselCondCode_wrk()
1382 || e->Iex.Binop.op == Iop_CmpLT64U in iselCondCode_wrk()
1383 || e->Iex.Binop.op == Iop_CmpLE64S in iselCondCode_wrk()
1384 || e->Iex.Binop.op == Iop_CmpLE64U in iselCondCode_wrk()
1385 || e->Iex.Binop.op == Iop_CasCmpEQ64)) { in iselCondCode_wrk()
1386 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1387 ARM64RIA* argR = iselIntExpr_RIA(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
1389 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
1402 && (e->Iex.Binop.op == Iop_CmpEQ32 in iselCondCode_wrk()
1403 || e->Iex.Binop.op == Iop_CmpNE32 in iselCondCode_wrk()
1404 || e->Iex.Binop.op == Iop_CmpLT32S in iselCondCode_wrk()
1405 || e->Iex.Binop.op == Iop_CmpLT32U in iselCondCode_wrk()
1406 || e->Iex.Binop.op == Iop_CmpLE32S in iselCondCode_wrk()
1407 || e->Iex.Binop.op == Iop_CmpLE32U in iselCondCode_wrk()
1408 || e->Iex.Binop.op == Iop_CasCmpEQ32)) { in iselCondCode_wrk()
1409 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1410 ARM64RIA* argR = iselIntExpr_RIA(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
1412 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
1425 && (e->Iex.Binop.op == Iop_CasCmpEQ16)) { in iselCondCode_wrk()
1426 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1427 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
1431 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
1439 && (e->Iex.Binop.op == Iop_CasCmpEQ8)) { in iselCondCode_wrk()
1440 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1441 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
1445 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
1523 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
1525 if (isZeroU64(e->Iex.Binop.arg1)) { in iselIntExpr_R_wrk()
1526 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1537 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
1540 Bool isAdd = e->Iex.Binop.op == Iop_Add64 in iselIntExpr_R_wrk()
1541 || e->Iex.Binop.op == Iop_Add32; in iselIntExpr_R_wrk()
1543 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1544 ARM64RIA* argR = iselIntExpr_RIA(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1553 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
1559 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1560 ARM64RIL* argR = iselIntExpr_RIL(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1569 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
1575 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1576 ARM64RI6* argR = iselIntExpr_RI6(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1582 Bool zx = e->Iex.Binop.op == Iop_Shr32; in iselIntExpr_R_wrk()
1583 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1584 ARM64RI6* argR = iselIntExpr_RI6(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1594 if (e->Iex.Binop.op == Iop_Mul64 || e->Iex.Binop.op == Iop_Mul32) { in iselIntExpr_R_wrk()
1595 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1596 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1603 if (e->Iex.Binop.op == Iop_MullU32 || e->Iex.Binop.op == Iop_MullS32) { in iselIntExpr_R_wrk()
1604 Bool isS = e->Iex.Binop.op == Iop_MullS32; in iselIntExpr_R_wrk()
1605 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1607 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1616 if (e->Iex.Binop.op == Iop_Max32U) { in iselIntExpr_R_wrk()
1617 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1618 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1625 if (e->Iex.Binop.op == Iop_32HLto64) { in iselIntExpr_R_wrk()
1626 HReg hi32s = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1627 HReg lo32s = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1637 if (e->Iex.Binop.op == Iop_CmpF64 || e->Iex.Binop.op == Iop_CmpF32) { in iselIntExpr_R_wrk()
1638 Bool isD = e->Iex.Binop.op == Iop_CmpF64; in iselIntExpr_R_wrk()
1639 HReg dL = (isD ? iselDblExpr : iselFltExpr)(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1640 HReg dR = (isD ? iselDblExpr : iselFltExpr)(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1661 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
1692 IRExpr* arg1 = e->Iex.Binop.arg1; in iselIntExpr_R_wrk()
1707 (env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1716 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
1730 HReg regL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1731 HReg regR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
2119 switch (e->Iex.Binop.op) { in iselInt128Expr_wrk()
2123 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS64); in iselInt128Expr_wrk()
2124 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselInt128Expr_wrk()
2125 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselInt128Expr_wrk()
2138 *rHi = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselInt128Expr_wrk()
2139 *rLo = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselInt128Expr_wrk()
2393 switch (e->Iex.Binop.op) { in iselV128Expr_wrk()
2396 HReg arg = iselV128Expr(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2398 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2400 = e->Iex.Binop.op == Iop_Sqrt32Fx4 in iselV128Expr_wrk()
2407 HReg argL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2408 HReg argR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2468 HReg argL = iselV128Expr(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2469 HReg argR = iselV128Expr(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2473 switch (e->Iex.Binop.op) { in iselV128Expr_wrk()
2620 HReg argL = iselV128Expr(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2621 HReg argR = iselV128Expr(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2623 switch (e->Iex.Binop.op) { in iselV128Expr_wrk()
2659 IRExpr* argL = e->Iex.Binop.arg1; in iselV128Expr_wrk()
2660 IRExpr* argR = e->Iex.Binop.arg2; in iselV128Expr_wrk()
2667 switch (e->Iex.Binop.op) { in iselV128Expr_wrk()
2695 switch (e->Iex.Binop.op) { in iselV128Expr_wrk()
2734 switch (e->Iex.Binop.op) { in iselV128Expr_wrk()
2775 IRExpr* argL = e->Iex.Binop.arg1; in iselV128Expr_wrk()
2776 IRExpr* argR = e->Iex.Binop.arg2; in iselV128Expr_wrk()
2781 switch (e->Iex.Binop.op) { in iselV128Expr_wrk()
2867 Bool isSHR = e->Iex.Binop.op == Iop_ShrV128; in iselV128Expr_wrk()
2873 IRExpr* argL = e->Iex.Binop.arg1; in iselV128Expr_wrk()
2874 IRExpr* argR = e->Iex.Binop.arg2; in iselV128Expr_wrk()
2917 HReg iSrcL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselV128Expr_wrk()
2918 HReg iSrcR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselV128Expr_wrk()
2923 switch (e->Iex.Binop.op) { in iselV128Expr_wrk()
3114 switch (e->Iex.Binop.op) { in iselDblExpr_wrk()
3118 HReg src = iselDblExpr(env, e->Iex.Binop.arg2); in iselDblExpr_wrk()
3120 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselDblExpr_wrk()
3122 switch (e->Iex.Binop.op) { in iselDblExpr_wrk()
3133 ARM64CvtOp cvt_op = e->Iex.Binop.op == Iop_I64StoF64 in iselDblExpr_wrk()
3135 HReg srcI = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselDblExpr_wrk()
3136 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselDblExpr_wrk()
3283 switch (e->Iex.Binop.op) { in iselFltExpr_wrk()
3287 HReg src = iselFltExpr(env, e->Iex.Binop.arg2); in iselFltExpr_wrk()
3289 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselFltExpr_wrk()
3291 switch (e->Iex.Binop.op) { in iselFltExpr_wrk()
3301 HReg srcD = iselDblExpr(env, e->Iex.Binop.arg2); in iselFltExpr_wrk()
3302 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselFltExpr_wrk()
3312 switch (e->Iex.Binop.op) { in iselFltExpr_wrk()
3319 HReg srcI = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselFltExpr_wrk()
3320 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselFltExpr_wrk()
3405 switch (e->Iex.Binop.op) { in iselF16Expr_wrk()
3407 HReg srcS = iselFltExpr(env, e->Iex.Binop.arg2); in iselF16Expr_wrk()
3408 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselF16Expr_wrk()
3414 HReg srcD = iselDblExpr(env, e->Iex.Binop.arg2); in iselF16Expr_wrk()
3415 set_FPCR_rounding_mode(env, e->Iex.Binop.arg1); in iselF16Expr_wrk()
3459 switch (e->Iex.Binop.op) { in iselV256Expr_wrk()
3461 *rHi = iselV128Expr(env, e->Iex.Binop.arg1); in iselV256Expr_wrk()
3462 *rLo = iselV128Expr(env, e->Iex.Binop.arg2); in iselV256Expr_wrk()
3482 HReg argL = iselV128Expr(env, e->Iex.Binop.arg1); in iselV256Expr_wrk()
3483 HReg argR = iselV128Expr(env, e->Iex.Binop.arg2); in iselV256Expr_wrk()
3488 switch (e->Iex.Binop.op) { in iselV256Expr_wrk()