Lines Matching refs:Ico
457 && guard->Iex.Const.con->Ico.U1 == True) { in doHelperCallWithArgsOnStack()
633 && guard->Iex.Const.con->Ico.U1 == True) { in doHelperCall()
769 && guard->Iex.Const.con->Ico.U1 == True) { in doHelperCall()
920 Int simm = (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32; in iselIntExpr_AMode1_wrk()
986 Int simm = (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32; in iselIntExpr_AMode2_wrk()
1038 Int simm = (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32; in iselIntExpr_AModeV_wrk()
1113 case Ico_U32: u = e->Iex.Const.con->Ico.U32; break; in iselIntExpr_RI84_wrk()
1114 case Ico_U16: u = 0xFFFF & (e->Iex.Const.con->Ico.U16); break; in iselIntExpr_RI84_wrk()
1115 case Ico_U8: u = 0xFF & (e->Iex.Const.con->Ico.U8); break; in iselIntExpr_RI84_wrk()
1167 case Ico_U32: u = e->Iex.Const.con->Ico.U32; break; in iselIntExpr_RI5_wrk()
1168 case Ico_U16: u = 0xFFFF & (e->Iex.Const.con->Ico.U16); break; in iselIntExpr_RI5_wrk()
1169 case Ico_U8: u = 0xFF & (e->Iex.Const.con->Ico.U8); break; in iselIntExpr_RI5_wrk()
1290 vassert(e->Iex.Const.con->Ico.U1 == True in iselCondCode_wrk()
1291 || e->Iex.Const.con->Ico.U1 == False); in iselCondCode_wrk()
1295 return e->Iex.Const.con->Ico.U1 ? ARMcc_EQ : ARMcc_NE; in iselCondCode_wrk()
1520 index = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselIntExpr_R_wrk()
1542 UInt index = con->Ico.U8; in iselIntExpr_R_wrk()
1562 index = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselIntExpr_R_wrk()
2013 case Ico_U32: u = e->Iex.Const.con->Ico.U32; break; in iselIntExpr_R_wrk()
2014 case Ico_U16: u = 0xFFFF & (e->Iex.Const.con->Ico.U16); break; in iselIntExpr_R_wrk()
2015 case Ico_U8: u = 0xFF & (e->Iex.Const.con->Ico.U8); break; in iselIntExpr_R_wrk()
2078 ULong w64 = e->Iex.Const.con->Ico.U64; in iselInt64Expr_wrk()
2845 imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
2869 imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
2893 imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
2940 Int nshift = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
3274 imm6 = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
3473 index = mi.bindee[1]->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
3492 index = mi.bindee[1]->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
3511 index = mi.bindee[1]->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
3889 imm4 = triop->arg3->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
3910 index = triop->arg2->Iex.Const.con->Ico.U8; in iselNeon64Expr_wrk()
3970 if (e->Iex.Const.con->Ico.V128 == 0x0000) { in iselNeonExpr_wrk()
3975 if (e->Iex.Const.con->Ico.V128 == 0xFFFF) { in iselNeonExpr_wrk()
4114 index = mi.bindee[1]->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
4133 index = mi.bindee[1]->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
4152 index = mi.bindee[1]->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
4467 e->Iex.Binop.arg1->Iex.Const.con->Ico.U64 == in iselNeonExpr_wrk()
4468 e->Iex.Binop.arg2->Iex.Const.con->Ico.U64) { in iselNeonExpr_wrk()
4469 ULong imm64 = e->Iex.Binop.arg2->Iex.Const.con->Ico.U64; in iselNeonExpr_wrk()
4993 imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
5017 imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
5041 imm = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
5360 imm6 = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
5440 imm4 = triop->arg3->Iex.Const.con->Ico.U8; in iselNeonExpr_wrk()
5521 if (con->tag == Ico_F64i && con->Ico.F64i == 0ULL) { in iselDblExpr_wrk()
6378 = stmt->Ist.Exit.dst->Ico.U32 > env->max_ga; in iselStmt()
6380 addInstr(env, ARMInstr_XDirect(stmt->Ist.Exit.dst->Ico.U32, in iselStmt()
6450 = cdst->Ico.U32 > env->max_ga; in iselNext()
6452 addInstr(env, ARMInstr_XDirect(cdst->Ico.U32, in iselNext()