Lines Matching refs:vassert
170 vassert(r >= 0 && r < 32); in ppHRegPPC()
175 vassert(r >= 0 && r < 32); in ppHRegPPC()
180 vassert(r >= 0 && r < 32); in ppHRegPPC()
185 vassert(r >= 0 && r < 32); in ppHRegPPC()
222 vassert(flag == Pcf_NONE); in mk_PPCCondCode()
224 vassert(flag != Pcf_NONE); in mk_PPCCondCode()
232 vassert(ct != Pct_ALWAYS); in invertCondTest()
241 vassert(idx >= -0x8000 && idx < 0x8000); in PPCAMode_IR()
324 vassert(imm16 != 0x8000); in PPCRH_Imm()
325 vassert(syned == True || syned == False); in PPCRH_Imm()
441 vassert(simm5 >= -16 && simm5 <= 15); in PPCVI5s_Imm()
448 vassert(hregClass(reg) == HRcVec128); in PPCVI5s_Reg()
772 vassert( (Long)imm64 == (Long)(Int)(UInt)imm64 ); in PPCInstr_LI()
838 if (!hi) vassert(!syned); in PPCInstr_MulL()
864 vassert(0 == (argiregs & ~mask)); in PPCInstr_Call()
865 vassert(is_sane_RetLoc(rloc)); in PPCInstr_Call()
904 vassert(cond.test != Pct_ALWAYS); in PPCInstr_CMov()
914 vassert(sz == 1 || sz == 2 || sz == 4 || sz == 8); in PPCInstr_Load()
915 if (sz == 8) vassert(mode64); in PPCInstr_Load()
926 vassert(sz == 1 || sz == 2 || sz == 4 || sz == 8); in PPCInstr_LoadL()
927 if (sz == 8) vassert(mode64); in PPCInstr_LoadL()
937 vassert(sz == 1 || sz == 2 || sz == 4 || sz == 8); in PPCInstr_Store()
938 if (sz == 8) vassert(mode64); in PPCInstr_Store()
947 vassert(sz == 1 || sz == 2 || sz == 4 || sz == 8); in PPCInstr_StoreC()
948 if (sz == 8) vassert(mode64); in PPCInstr_StoreC()
1036 vassert(sz == 4 || sz == 8); in PPCInstr_FpLdSt()
1275 vassert(tmp == True || tmp == False); // iow, no high bits set in PPCInstr_FpCftI()
1302 vassert(cond.test != Pct_ALWAYS); in PPCInstr_FpCMov()
1479 vassert(cond.test != Pct_ALWAYS); in PPCInstr_AvCMov()
2429 vassert(0 == (argir & ~((1<<3)|(1<<4)|(1<<5)|(1<<6) in getRegUsage_PPCInstr()
3158 vassert(!hregIsVirtual(rreg)); in genSpill_PPC()
3163 vassert(mode64); in genSpill_PPC()
3167 vassert(!mode64); in genSpill_PPC()
3188 vassert(!hregIsVirtual(rreg)); in genReload_PPC()
3193 vassert(mode64); in genReload_PPC()
3197 vassert(!mode64); in genReload_PPC()
3219 vassert(hregClass(r) == (mode64 ? HRcInt64 : HRcInt32)); in iregEnc()
3220 vassert(!hregIsVirtual(r)); in iregEnc()
3222 vassert(n <= 32); in iregEnc()
3229 vassert(hregClass(fr) == HRcFlt64); in fregEnc()
3230 vassert(!hregIsVirtual(fr)); in fregEnc()
3232 vassert(n <= 32); in fregEnc()
3239 vassert(hregClass(v) == HRcVec128); in vregEnc()
3240 vassert(!hregIsVirtual(v)); in vregEnc()
3242 vassert(n <= 32); in vregEnc()
3289 vassert(opc1 < 0x40); in mkFormD()
3290 vassert(r1 < 0x20); in mkFormD()
3291 vassert(r2 < 0x20); in mkFormD()
3302 vassert(opc1 < 0x40); in mkFormMD()
3303 vassert(r1 < 0x20); in mkFormMD()
3304 vassert(r2 < 0x20); in mkFormMD()
3305 vassert(imm1 < 0x40); in mkFormMD()
3306 vassert(imm2 < 0x40); in mkFormMD()
3307 vassert(opc2 < 0x08); in mkFormMD()
3319 vassert(opc1 < 0x40); in mkFormX()
3320 vassert(r1 < 0x20); in mkFormX()
3321 vassert(r2 < 0x20); in mkFormX()
3322 vassert(r3 < 0x20); in mkFormX()
3323 vassert(opc2 < 0x400); in mkFormX()
3324 vassert(b0 < 0x2); in mkFormX()
3335 vassert(opc1 < 0x40); in mkFormXO()
3336 vassert(r1 < 0x20); in mkFormXO()
3337 vassert(r2 < 0x20); in mkFormXO()
3338 vassert(r3 < 0x20); in mkFormXO()
3339 vassert(b10 < 0x2); in mkFormXO()
3340 vassert(opc2 < 0x200); in mkFormXO()
3341 vassert(b0 < 0x2); in mkFormXO()
3351 vassert(opc1 < 0x40); in mkFormXL()
3352 vassert(f1 < 0x20); in mkFormXL()
3353 vassert(f2 < 0x20); in mkFormXL()
3354 vassert(f3 < 0x20); in mkFormXL()
3355 vassert(opc2 < 0x400); in mkFormXL()
3356 vassert(b0 < 0x2); in mkFormXL()
3367 vassert(r1 < 0x20); in mkFormXFX()
3368 vassert(f2 < 0x20); in mkFormXFX()
3369 vassert(opc2 < 0x400); in mkFormXFX()
3372 vassert(f2 < 0x100); in mkFormXFX()
3378 vassert(f2 < 0x400); in mkFormXFX()
3393 vassert(FM < 0x100); in mkFormXFL()
3394 vassert(freg < 0x20); in mkFormXFL()
3404 vassert(opc1 < 0x40); in mkFormXS()
3405 vassert(r1 < 0x20); in mkFormXS()
3406 vassert(r2 < 0x20); in mkFormXS()
3407 vassert(imm < 0x40); in mkFormXS()
3408 vassert(opc2 < 0x400); in mkFormXS()
3409 vassert(b0 < 0x2); in mkFormXS()
3422 vassert(LI < 0x1000000);
3423 vassert(AA < 0x2);
3424 vassert(LK < 0x2);
3435 vassert(BO < 0x20); in mkFormB()
3436 vassert(BI < 0x20); in mkFormB()
3437 vassert(BD < 0x4000); in mkFormB()
3438 vassert(AA < 0x2); in mkFormB()
3439 vassert(LK < 0x2); in mkFormB()
3451 vassert(opc1 < 0x40); in mkFormM()
3452 vassert(r1 < 0x20); in mkFormM()
3453 vassert(r2 < 0x20); in mkFormM()
3454 vassert(f3 < 0x20); in mkFormM()
3455 vassert(MB < 0x20); in mkFormM()
3456 vassert(ME < 0x20); in mkFormM()
3457 vassert(Rc < 0x2); in mkFormM()
3468 vassert(opc1 < 0x40); in mkFormA()
3469 vassert(r1 < 0x20); in mkFormA()
3470 vassert(r2 < 0x20); in mkFormA()
3471 vassert(r3 < 0x20); in mkFormA()
3472 vassert(r4 < 0x20); in mkFormA()
3473 vassert(opc2 < 0x20); in mkFormA()
3474 vassert(b0 < 0x2 ); in mkFormA()
3485 vassert(opc1 < 0x40); in mkFormZ22()
3486 vassert(r1 < 0x20); in mkFormZ22()
3487 vassert(r2 < 0x20); in mkFormZ22()
3488 vassert(constant < 0x40); /* 6 bit constant */ in mkFormZ22()
3489 vassert(opc2 < 0x200); /* 9 bit field */ in mkFormZ22()
3490 vassert(b0 < 0x2); in mkFormZ22()
3501 vassert(opc1 < 0x40); in mkFormZ23()
3502 vassert(r1 < 0x20); in mkFormZ23()
3503 vassert(r2 < 0x20); in mkFormZ23()
3504 vassert(r3 < 0x20); in mkFormZ23()
3505 vassert(rmc < 0x4); in mkFormZ23()
3506 vassert(opc2 < 0x100); in mkFormZ23()
3507 vassert(b0 < 0x2); in mkFormZ23()
3517 vassert(am->tag == Pam_IR); in doAMode_IR()
3518 vassert(am->Pam.IR.index < 0x10000); in doAMode_IR()
3524 vassert(mode64); in doAMode_IR()
3527 vassert(0 == (idx & 3)); in doAMode_IR()
3538 vassert(am->tag == Pam_RR); in doAMode_RR()
3552 vassert(r_dst < 0x20); in mkLoadImm()
3579 vassert(mode64); in mkLoadImm()
3615 vassert(r_dst < 0x20); in mkLoadImm_EXACTLY2or5()
3661 vassert(r_dst < 0x20); in isLoadImm_EXACTLY2or5()
3679 vassert(p == (UChar*)&expect[2]); in isLoadImm_EXACTLY2or5()
3706 vassert(p == (UChar*)&expect[5]); in isLoadImm_EXACTLY2or5()
3728 vassert(0 == (am->Pam.IR.index & 3)); in do_load_or_store_machine_word()
3731 case 4: opc1 = 32; vassert(!mode64); break; in do_load_or_store_machine_word()
3732 case 8: opc1 = 58; vassert(mode64); break; in do_load_or_store_machine_word()
3733 default: vassert(0); in do_load_or_store_machine_word()
3740 vassert(0); in do_load_or_store_machine_word()
3742 vassert(0); in do_load_or_store_machine_word()
3749 vassert(0 == (am->Pam.IR.index & 3)); in do_load_or_store_machine_word()
3752 case 4: opc1 = 36; vassert(!mode64); break; in do_load_or_store_machine_word()
3753 case 8: opc1 = 62; vassert(mode64); break; in do_load_or_store_machine_word()
3754 default: vassert(0); in do_load_or_store_machine_word()
3761 vassert(0); in do_load_or_store_machine_word()
3763 vassert(0); in do_load_or_store_machine_word()
3780 vassert(0 == (am->Pam.IR.index & 3)); in do_load_or_store_word32()
3788 vassert(0); in do_load_or_store_word32()
3790 vassert(0); in do_load_or_store_word32()
3797 vassert(0 == (am->Pam.IR.index & 3)); in do_load_or_store_word32()
3805 vassert(0); in do_load_or_store_word32()
3807 vassert(0); in do_load_or_store_word32()
3817 vassert(r_dst < 0x20); in mkMoveReg()
3818 vassert(r_src < 0x20); in mkMoveReg()
3831 vassert(opc1 < 0x40); in mkFormVX()
3832 vassert(r1 < 0x20); in mkFormVX()
3833 vassert(r2 < 0x20); in mkFormVX()
3834 vassert(r3 < 0x20); in mkFormVX()
3835 vassert(opc2 < 0x800); in mkFormVX()
3854 vassert(opc1 < 0x40); in mkFormVSXRND()
3855 vassert(r1 < 0x20); in mkFormVSXRND()
3856 vassert(r2 < 0x20); in mkFormVSXRND()
3857 vassert(opc2 < 0x100); in mkFormVSXRND()
3858 vassert(EX < 0x2); in mkFormVSXRND()
3859 vassert(R < 0x2); in mkFormVSXRND()
3860 vassert(RMC < 0x4); in mkFormVSXRND()
3889 vassert(opc1 < 0x40); in mkFormVX_BX_TX()
3890 vassert(r1 < 0x40); in mkFormVX_BX_TX()
3891 vassert(r2 < 0x20); in mkFormVX_BX_TX()
3892 vassert(r3 < 0x40); in mkFormVX_BX_TX()
3893 vassert(opc2 < 0x800); in mkFormVX_BX_TX()
3918 vassert(opc1 < 0x40); in mkFormVXR0()
3919 vassert(r1 < 0x20); // register numbers are between 0 and 31 (5-bits) in mkFormVXR0()
3920 vassert(r2 < 0x20); in mkFormVXR0()
3921 vassert(r3 < 0x20); in mkFormVXR0()
3922 vassert(opc2 < 0x800); in mkFormVXR0()
3923 vassert(R0 < 0x2); in mkFormVXR0()
3933 vassert(opc1 < 0x40); in mkFormVXI()
3934 vassert(r1 < 0x20); in mkFormVXI()
3935 vassert(r2 < 0x20); in mkFormVXI()
3936 vassert(r3 < 0x20); in mkFormVXI()
3937 vassert(opc2 < 0x27); in mkFormVXI()
3947 vassert(opc1 < 0x40); in mkFormVXR()
3948 vassert(r1 < 0x20); in mkFormVXR()
3949 vassert(r2 < 0x20); in mkFormVXR()
3950 vassert(r3 < 0x20); in mkFormVXR()
3951 vassert(Rc < 0x2); in mkFormVXR()
3952 vassert(opc2 < 0x400); in mkFormVXR()
3962 vassert(opc1 < 0x40); in mkFormVA()
3963 vassert(r1 < 0x20); in mkFormVA()
3964 vassert(r2 < 0x20); in mkFormVA()
3965 vassert(r3 < 0x20); in mkFormVA()
3966 vassert(r4 < 0x20); in mkFormVA()
3967 vassert(opc2 < 0x40); in mkFormVA()
3990 vassert(nbuf >= 32); in emit_PPCInstr()
4015 vassert(srcR->Prh.Imm.syned); in emit_PPCInstr()
4016 vassert(srcR->Prh.Imm.imm16 != 0x8000); in emit_PPCInstr()
4027 vassert(srcR->Prh.Imm.syned); in emit_PPCInstr()
4028 vassert(srcR->Prh.Imm.imm16 != 0x8000); in emit_PPCInstr()
4040 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4051 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4062 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4085 vassert(sz32); in emit_PPCInstr()
4096 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4097 vassert(n > 0 && n < 32); in emit_PPCInstr()
4110 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4111 vassert(n > 0 && n < 64); in emit_PPCInstr()
4128 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4129 vassert(n > 0 && n < 32); in emit_PPCInstr()
4142 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4143 vassert(n > 0 && n < 64); in emit_PPCInstr()
4157 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4162 vassert(n >= 0 && n < 32); in emit_PPCInstr()
4164 vassert(n > 0 && n < 32); in emit_PPCInstr()
4174 vassert(!srcR->Prh.Imm.syned); in emit_PPCInstr()
4175 vassert(n > 0 && n < 64); in emit_PPCInstr()
4221 vassert(sz32); in emit_PPCInstr()
4227 vassert(syned == srcR->Prh.Imm.syned); in emit_PPCInstr()
4230 vassert(imm_srcR != 0x8000); in emit_PPCInstr()
4264 vassert(mode64); in emit_PPCInstr()
4273 vassert(mode64); in emit_PPCInstr()
4277 vassert(mode64); in emit_PPCInstr()
4293 vassert(sz32); in emit_PPCInstr()
4313 vassert(!i->Pin.MulL.syned); in emit_PPCInstr()
4330 vassert(sz32); in emit_PPCInstr()
4404 vassert(delta >= 16 && delta <= 32); in emit_PPCInstr()
4418 vassert(disp_cp_chain_me_to_slowEP != NULL); in emit_PPCInstr()
4419 vassert(disp_cp_chain_me_to_fastEP != NULL); in emit_PPCInstr()
4426 vassert(i->Pin.XDirect.cond.flag != Pcf_NONE); in emit_PPCInstr()
4430 vassert(i->Pin.XDirect.cond.flag == Pcf_NONE); in emit_PPCInstr()
4435 if (!mode64) vassert(0 == (((ULong)i->Pin.XDirect.dstGA) >> 32)); in emit_PPCInstr()
4464 vassert(delta >= 16 && delta <= 64 && 0 == (delta & 3)); in emit_PPCInstr()
4479 vassert(disp_cp_xindir != NULL); in emit_PPCInstr()
4486 vassert(i->Pin.XIndir.cond.flag != Pcf_NONE); in emit_PPCInstr()
4490 vassert(i->Pin.XIndir.cond.flag == Pcf_NONE); in emit_PPCInstr()
4512 vassert(delta >= 16 && delta <= 32 && 0 == (delta & 3)); in emit_PPCInstr()
4526 vassert(i->Pin.XAssisted.cond.flag != Pcf_NONE); in emit_PPCInstr()
4530 vassert(i->Pin.XAssisted.cond.flag == Pcf_NONE); in emit_PPCInstr()
4566 vassert(trcval != 0); in emit_PPCInstr()
4581 vassert(delta >= 16 && delta <= 32 && 0 == (delta & 3)); in emit_PPCInstr()
4593 vassert(i->Pin.CMov.cond.test != Pct_ALWAYS); in emit_PPCInstr()
4623 vassert(delta >= 8 && delta <= 24); in emit_PPCInstr()
4639 vassert(0 == (am_addr->Pam.IR.index & 3)); in emit_PPCInstr()
4645 case 8: opc1 = 58; vassert(mode64); break; in emit_PPCInstr()
4655 case 8: opc2 = 21; vassert(mode64); break; in emit_PPCInstr()
4700 vassert(cond.flag != Pcf_NONE); in emit_PPCInstr()
4740 vassert(0 == (am_addr->Pam.IR.index & 3)); in emit_PPCInstr()
4746 case 8: vassert(mode64); in emit_PPCInstr()
4758 case 8: vassert(mode64); in emit_PPCInstr()
5077 vassert(sz == 4 || sz == 8); in emit_PPCInstr()
5166 vassert(cc.test != Pct_ALWAYS); in emit_PPCInstr()
5191 vassert(crfD < 8); in emit_PPCInstr()
5218 vassert(sz == 1 || sz == 2 || sz == 4 || sz == 16); in emit_PPCInstr()
5800 vassert(shift <= 0xF); in emit_PPCInstr()
5809 vassert(sz == 8 || sz == 16 || sz == 32); in emit_PPCInstr()
5816 vassert(simm5 >= -16 && simm5 <= 15); in emit_PPCInstr()
5823 vassert(hregClass(i->Pin.AvSplat.src->Pvi.Reg) == HRcVec128); in emit_PPCInstr()
5838 vassert(cc.test != Pct_ALWAYS); in emit_PPCInstr()
6262 vassert(crfD < 8); in emit_PPCInstr()
6282 vassert(crfD < 8); in emit_PPCInstr()
6340 vassert(evCheckSzB_PPC() == (UChar*)p - (UChar*)p0); in emit_PPCInstr()
6381 vassert(!(*is_profInc)); in emit_PPCInstr()
6397 vassert(p - &buf[0] <= 64); in emit_PPCInstr()
6420 vassert((endness_host == VexEndnessBE) || in chainXDirect_PPC()
6423 vassert(endness_host == VexEndnessBE); in chainXDirect_PPC()
6436 vassert(0 == (3 & (HWord)p)); in chainXDirect_PPC()
6437 vassert(isLoadImm_EXACTLY2or5(p, /*r*/30, in chainXDirect_PPC()
6440 vassert(fetch32(p + (mode64 ? 20 : 8) + 0, endness_host) == 0x7FC903A6); in chainXDirect_PPC()
6441 vassert(fetch32(p + (mode64 ? 20 : 8) + 4, endness_host) == 0x4E800421); in chainXDirect_PPC()
6459 vassert(len == (mode64 ? 28 : 16)); /* stay sane */ in chainXDirect_PPC()
6474 vassert((endness_host == VexEndnessBE) || in unchainXDirect_PPC()
6477 vassert(endness_host == VexEndnessBE); in unchainXDirect_PPC()
6490 vassert(0 == (3 & (HWord)p)); in unchainXDirect_PPC()
6491 vassert(isLoadImm_EXACTLY2or5(p, /*r*/30, in unchainXDirect_PPC()
6494 vassert(fetch32(p + (mode64 ? 20 : 8) + 0, endness_host) == 0x7FC903A6); in unchainXDirect_PPC()
6495 vassert(fetch32(p + (mode64 ? 20 : 8) + 4, endness_host) == 0x4E800420); in unchainXDirect_PPC()
6513 vassert(len == (mode64 ? 28 : 16)); /* stay sane */ in unchainXDirect_PPC()
6527 vassert((endness_host == VexEndnessBE) || in patchProfInc_PPC()
6530 vassert(endness_host == VexEndnessBE); in patchProfInc_PPC()
6534 vassert(0 == (3 & (HWord)p)); in patchProfInc_PPC()
6538 vassert(isLoadImm_EXACTLY2or5(p, /*r*/30, in patchProfInc_PPC()
6541 vassert(fetch32(p + 20, endness_host) == 0xEBBE0000); in patchProfInc_PPC()
6542 vassert(fetch32(p + 24, endness_host) == 0x3BBD0001); in patchProfInc_PPC()
6543 vassert(fetch32(p + 28, endness_host) == 0xFBBE0000); in patchProfInc_PPC()
6548 vassert(len == 20); in patchProfInc_PPC()
6550 vassert(isLoadImm_EXACTLY2or5(p, /*r*/30, in patchProfInc_PPC()
6553 vassert(fetch32(p + 8, endness_host) == 0x83BE0004); in patchProfInc_PPC()
6554 vassert(fetch32(p + 12, endness_host) == 0x37BD0001); in patchProfInc_PPC()
6555 vassert(fetch32(p + 16, endness_host) == 0x93BE0004); in patchProfInc_PPC()
6556 vassert(fetch32(p + 20, endness_host) == 0x83BE0000); in patchProfInc_PPC()
6557 vassert(fetch32(p + 24, endness_host) == 0x7FBD0194); in patchProfInc_PPC()
6558 vassert(fetch32(p + 28, endness_host) == 0x93BE0000); in patchProfInc_PPC()
6563 vassert(len == 8); in patchProfInc_PPC()