Lines Matching refs:Binop
904 e->Iex.Binop.op==Iop_PRemC3210F64 in iselIntExpr_R_wrk()
925 if (e->Iex.Binop.op == Iop_Sub32 && isZeroU32(e->Iex.Binop.arg1)) { in iselIntExpr_R_wrk()
927 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
934 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
954 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
955 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
979 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
993 HReg regL = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
997 switch (e->Iex.Binop.op) { in iselIntExpr_R_wrk()
1019 if (e->Iex.Binop.arg2->tag == Iex_Const) { in iselIntExpr_R_wrk()
1022 vassert(e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U8); in iselIntExpr_R_wrk()
1023 nshift = e->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselIntExpr_R_wrk()
1030 HReg regR = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1039 if (e->Iex.Binop.op == Iop_Max32U) { in iselIntExpr_R_wrk()
1040 HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1042 HReg src2 = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1049 if (e->Iex.Binop.op == Iop_8HLto16) { in iselIntExpr_R_wrk()
1052 HReg hi8s = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1053 HReg lo8s = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1062 if (e->Iex.Binop.op == Iop_16HLto32) { in iselIntExpr_R_wrk()
1065 HReg hi16s = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1066 HReg lo16s = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1075 if (e->Iex.Binop.op == Iop_MullS16 || e->Iex.Binop.op == Iop_MullS8 in iselIntExpr_R_wrk()
1076 || e->Iex.Binop.op == Iop_MullU16 || e->Iex.Binop.op == Iop_MullU8) { in iselIntExpr_R_wrk()
1079 HReg a16s = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1080 HReg b16s = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1081 Int shift = (e->Iex.Binop.op == Iop_MullS8 in iselIntExpr_R_wrk()
1082 || e->Iex.Binop.op == Iop_MullU8) in iselIntExpr_R_wrk()
1084 X86ShiftOp shr_op = (e->Iex.Binop.op == Iop_MullS8 in iselIntExpr_R_wrk()
1085 || e->Iex.Binop.op == Iop_MullS16) in iselIntExpr_R_wrk()
1098 if (e->Iex.Binop.op == Iop_CmpF64) { in iselIntExpr_R_wrk()
1099 HReg fL = iselDblExpr(env, e->Iex.Binop.arg1); in iselIntExpr_R_wrk()
1100 HReg fR = iselDblExpr(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1109 if (e->Iex.Binop.op == Iop_F64toI32S in iselIntExpr_R_wrk()
1110 || e->Iex.Binop.op == Iop_F64toI16S) { in iselIntExpr_R_wrk()
1111 Int sz = e->Iex.Binop.op == Iop_F64toI16S ? 2 : 4; in iselIntExpr_R_wrk()
1112 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2); in iselIntExpr_R_wrk()
1128 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); in iselIntExpr_R_wrk()
1564 && e->Iex.Binop.op == Iop_Add32 in iselIntExpr_AMode_wrk()
1565 && e->Iex.Binop.arg2->tag == Iex_Const in iselIntExpr_AMode_wrk()
1566 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U32 in iselIntExpr_AMode_wrk()
1567 && e->Iex.Binop.arg1->tag == Iex_Binop in iselIntExpr_AMode_wrk()
1568 && e->Iex.Binop.arg1->Iex.Binop.op == Iop_Add32 in iselIntExpr_AMode_wrk()
1569 && e->Iex.Binop.arg1->Iex.Binop.arg2->tag == Iex_Binop in iselIntExpr_AMode_wrk()
1570 && e->Iex.Binop.arg1->Iex.Binop.arg2->Iex.Binop.op == Iop_Shl32 in iselIntExpr_AMode_wrk()
1571 && e->Iex.Binop.arg1 in iselIntExpr_AMode_wrk()
1572 ->Iex.Binop.arg2->Iex.Binop.arg2->tag == Iex_Const in iselIntExpr_AMode_wrk()
1573 && e->Iex.Binop.arg1 in iselIntExpr_AMode_wrk()
1574 ->Iex.Binop.arg2->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U8) { in iselIntExpr_AMode_wrk()
1575 UInt shift = e->Iex.Binop.arg1 in iselIntExpr_AMode_wrk()
1576 ->Iex.Binop.arg2->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselIntExpr_AMode_wrk()
1577 UInt imm32 = e->Iex.Binop.arg2->Iex.Const.con->Ico.U32; in iselIntExpr_AMode_wrk()
1579 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
1580 HReg r2 = iselIntExpr_R(env, e->Iex.Binop.arg1 in iselIntExpr_AMode_wrk()
1581 ->Iex.Binop.arg2->Iex.Binop.arg1 ); in iselIntExpr_AMode_wrk()
1588 && e->Iex.Binop.op == Iop_Add32 in iselIntExpr_AMode_wrk()
1589 && e->Iex.Binop.arg2->tag == Iex_Binop in iselIntExpr_AMode_wrk()
1590 && e->Iex.Binop.arg2->Iex.Binop.op == Iop_Shl32 in iselIntExpr_AMode_wrk()
1591 && e->Iex.Binop.arg2->Iex.Binop.arg2->tag == Iex_Const in iselIntExpr_AMode_wrk()
1592 && e->Iex.Binop.arg2->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U8) { in iselIntExpr_AMode_wrk()
1593 UInt shift = e->Iex.Binop.arg2->Iex.Binop.arg2->Iex.Const.con->Ico.U8; in iselIntExpr_AMode_wrk()
1595 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
1596 HReg r2 = iselIntExpr_R(env, e->Iex.Binop.arg2->Iex.Binop.arg1 ); in iselIntExpr_AMode_wrk()
1603 && e->Iex.Binop.op == Iop_Add32 in iselIntExpr_AMode_wrk()
1604 && e->Iex.Binop.arg2->tag == Iex_Const in iselIntExpr_AMode_wrk()
1605 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U32) { in iselIntExpr_AMode_wrk()
1606 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselIntExpr_AMode_wrk()
1607 return X86AMode_IR(e->Iex.Binop.arg2->Iex.Const.con->Ico.U32, r1); in iselIntExpr_AMode_wrk()
1934 && (e->Iex.Binop.op == Iop_CmpEQ8 in iselCondCode_wrk()
1935 || e->Iex.Binop.op == Iop_CmpNE8 in iselCondCode_wrk()
1936 || e->Iex.Binop.op == Iop_CasCmpEQ8 in iselCondCode_wrk()
1937 || e->Iex.Binop.op == Iop_CasCmpNE8)) { in iselCondCode_wrk()
1938 if (isZeroU8(e->Iex.Binop.arg2)) { in iselCondCode_wrk()
1939 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1941 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
1947 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1948 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
1953 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
1963 && (e->Iex.Binop.op == Iop_CmpEQ16 in iselCondCode_wrk()
1964 || e->Iex.Binop.op == Iop_CmpNE16 in iselCondCode_wrk()
1965 || e->Iex.Binop.op == Iop_CasCmpEQ16 in iselCondCode_wrk()
1966 || e->Iex.Binop.op == Iop_CasCmpNE16 in iselCondCode_wrk()
1967 || e->Iex.Binop.op == Iop_ExpCmpNE16)) { in iselCondCode_wrk()
1968 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
1969 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
1974 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
1987 && e->Iex.Binop.op == Iop_CmpNE32 in iselCondCode_wrk()
1988 && e->Iex.Binop.arg1->tag == Iex_CCall in iselCondCode_wrk()
1989 && e->Iex.Binop.arg2->tag == Iex_Const) { in iselCondCode_wrk()
1990 IRExpr* cal = e->Iex.Binop.arg1; in iselCondCode_wrk()
1991 IRExpr* con = e->Iex.Binop.arg2; in iselCondCode_wrk()
2013 && (e->Iex.Binop.op == Iop_CmpEQ32 in iselCondCode_wrk()
2014 || e->Iex.Binop.op == Iop_CmpNE32 in iselCondCode_wrk()
2015 || e->Iex.Binop.op == Iop_CmpLT32S in iselCondCode_wrk()
2016 || e->Iex.Binop.op == Iop_CmpLT32U in iselCondCode_wrk()
2017 || e->Iex.Binop.op == Iop_CmpLE32S in iselCondCode_wrk()
2018 || e->Iex.Binop.op == Iop_CmpLE32U in iselCondCode_wrk()
2019 || e->Iex.Binop.op == Iop_CasCmpEQ32 in iselCondCode_wrk()
2020 || e->Iex.Binop.op == Iop_CasCmpNE32 in iselCondCode_wrk()
2021 || e->Iex.Binop.op == Iop_ExpCmpNE32)) { in iselCondCode_wrk()
2022 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselCondCode_wrk()
2023 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2); in iselCondCode_wrk()
2025 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
2039 && (e->Iex.Binop.op == Iop_CmpNE64 in iselCondCode_wrk()
2040 || e->Iex.Binop.op == Iop_CmpEQ64)) { in iselCondCode_wrk()
2044 iselInt64Expr( &hi1, &lo1, env, e->Iex.Binop.arg1 ); in iselCondCode_wrk()
2045 iselInt64Expr( &hi2, &lo2, env, e->Iex.Binop.arg2 ); in iselCondCode_wrk()
2051 switch (e->Iex.Binop.op) { in iselCondCode_wrk()
2187 switch (e->Iex.Binop.op) { in iselInt64Expr_wrk()
2196 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS32); in iselInt64Expr_wrk()
2197 X86RM* rmLeft = iselIntExpr_RM(env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2198 HReg rRight = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2217 Bool syned = toBool(e->Iex.Binop.op == Iop_DivModS64to32); in iselInt64Expr_wrk()
2218 X86RM* rmRight = iselIntExpr_RM(env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2219 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2237 X86AluOp op = e->Iex.Binop.op==Iop_Or64 ? Xalu_OR in iselInt64Expr_wrk()
2238 : e->Iex.Binop.op==Iop_And64 ? Xalu_AND in iselInt64Expr_wrk()
2240 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2241 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2253 if (e->Iex.Binop.arg2->tag == Iex_Const) { in iselInt64Expr_wrk()
2255 ULong w64 = e->Iex.Binop.arg2->Iex.Const.con->Ico.U64; in iselInt64Expr_wrk()
2261 vassert(e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64); in iselInt64Expr_wrk()
2262 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2276 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2279 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2280 if (e->Iex.Binop.op==Iop_Add64) { in iselInt64Expr_wrk()
2294 *rHi = iselIntExpr_R(env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2295 *rLo = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2323 rAmt = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2324 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2365 rAmt = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2366 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2388 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2409 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); in iselInt64Expr_wrk()
2540 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2543 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2581 X86RMI* y = iselIntExpr_RMI(env, e->Iex.Binop.arg2); in iselInt64Expr_wrk()
2583 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1); in iselInt64Expr_wrk()
2907 && e->Iex.Binop.op == Iop_F64toF32) { in iselFltExpr_wrk()
2912 HReg src = iselDblExpr(env, e->Iex.Binop.arg2); in iselFltExpr_wrk()
2913 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); in iselFltExpr_wrk()
2942 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_RoundF32toInt) { in iselFltExpr_wrk()
2943 HReg rf = iselFltExpr(env, e->Iex.Binop.arg2); in iselFltExpr_wrk()
2950 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); in iselFltExpr_wrk()
3097 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_RoundF64toInt) { in iselDblExpr_wrk()
3098 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2); in iselDblExpr_wrk()
3105 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); in iselDblExpr_wrk()
3116 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_I64StoF64) { in iselDblExpr_wrk()
3119 iselInt64Expr( &rHi, &rLo, env, e->Iex.Binop.arg2); in iselDblExpr_wrk()
3124 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); in iselDblExpr_wrk()
3139 switch (e->Iex.Binop.op) { in iselDblExpr_wrk()
3149 HReg src = iselDblExpr(env, e->Iex.Binop.arg2); in iselDblExpr_wrk()
3491 switch (e->Iex.Binop.op) { in iselVecExpr_wrk()
3498 HReg arg = iselVecExpr(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3502 addInstr(env, (e->Iex.Binop.op == Iop_Sqrt64Fx2 in iselVecExpr_wrk()
3510 HReg srcV = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3511 HReg srcI = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3523 HReg srcV = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3527 iselInt64Expr(&srcIhi, &srcIlo, env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3547 iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3551 iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3568 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3569 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3584 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3585 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3604 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3605 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3623 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3624 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3692 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3693 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3716 HReg greg = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3717 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
3744 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1); in iselVecExpr_wrk()
3745 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2); in iselVecExpr_wrk()
4030 && stmt->Ist.WrTmp.data->Iex.Binop.op == Iop_Add32) { in iselStmt()