Lines Matching refs:vassert
91 #define X86ST(f) vassert(0)
99 #define AMD64ST(f) vassert(0)
107 #define PPC32ST(f) vassert(0)
115 #define PPC64ST(f) vassert(0)
123 #define S390ST(f) vassert(0)
131 #define ARMST(f) vassert(0)
139 #define ARM64ST(f) vassert(0)
147 #define MIPS32ST(f) vassert(0)
155 #define MIPS64ST(f) vassert(0)
212 vassert(!vex_initdone); in LibVEX_Init()
213 vassert(failure_exit); in LibVEX_Init()
214 vassert(log_bytes); in LibVEX_Init()
215 vassert(debuglevel >= 0); in LibVEX_Init()
217 vassert(vcon->iropt_verbosity >= 0); in LibVEX_Init()
218 vassert(vcon->iropt_level >= 0); in LibVEX_Init()
219 vassert(vcon->iropt_level <= 2); in LibVEX_Init()
220 vassert(vcon->iropt_unroll_thresh >= 0); in LibVEX_Init()
221 vassert(vcon->iropt_unroll_thresh <= 400); in LibVEX_Init()
222 vassert(vcon->guest_max_insns >= 1); in LibVEX_Init()
223 vassert(vcon->guest_max_insns <= 100); in LibVEX_Init()
224 vassert(vcon->guest_chase_thresh >= 0); in LibVEX_Init()
225 vassert(vcon->guest_chase_thresh < vcon->guest_max_insns); in LibVEX_Init()
226 vassert(vcon->guest_chase_cond == True in LibVEX_Init()
235 vassert(1 == sizeof(UChar)); in LibVEX_Init()
236 vassert(1 == sizeof(Char)); in LibVEX_Init()
237 vassert(2 == sizeof(UShort)); in LibVEX_Init()
238 vassert(2 == sizeof(Short)); in LibVEX_Init()
239 vassert(4 == sizeof(UInt)); in LibVEX_Init()
240 vassert(4 == sizeof(Int)); in LibVEX_Init()
241 vassert(8 == sizeof(ULong)); in LibVEX_Init()
242 vassert(8 == sizeof(Long)); in LibVEX_Init()
243 vassert(4 == sizeof(Float)); in LibVEX_Init()
244 vassert(8 == sizeof(Double)); in LibVEX_Init()
245 vassert(1 == sizeof(Bool)); in LibVEX_Init()
246 vassert(4 == sizeof(Addr32)); in LibVEX_Init()
247 vassert(8 == sizeof(Addr64)); in LibVEX_Init()
248 vassert(16 == sizeof(U128)); in LibVEX_Init()
249 vassert(16 == sizeof(V128)); in LibVEX_Init()
250 vassert(32 == sizeof(U256)); in LibVEX_Init()
252 vassert(sizeof(void*) == 4 || sizeof(void*) == 8); in LibVEX_Init()
253 vassert(sizeof(void*) == sizeof(int*)); in LibVEX_Init()
254 vassert(sizeof(void*) == sizeof(HWord)); in LibVEX_Init()
255 vassert(sizeof(void*) == sizeof(Addr)); in LibVEX_Init()
256 vassert(sizeof(unsigned long) == sizeof(SizeT)); in LibVEX_Init()
258 vassert(VEX_HOST_WORDSIZE == sizeof(void*)); in LibVEX_Init()
259 vassert(VEX_HOST_WORDSIZE == sizeof(HWord)); in LibVEX_Init()
264 vassert(sizeof(IRExpr) == 16); in LibVEX_Init()
265 vassert(sizeof(IRStmt) == 20 /* x86 */ in LibVEX_Init()
268 vassert(sizeof(IRExpr) == 32); in LibVEX_Init()
269 vassert(sizeof(IRStmt) == 32); in LibVEX_Init()
273 vassert(sizeof(HReg) == 4); in LibVEX_Init()
277 vassert(N_RREGUNIVERSE_REGS == 64); in LibVEX_Init()
283 vassert(udiv32(100, 7) == 14); in LibVEX_Init()
284 vassert(sdiv32(100, 7) == 14); in LibVEX_Init()
285 vassert(sdiv32(-100, 7) == -14); /* and not -15 */ in LibVEX_Init()
286 vassert(sdiv32(100, -7) == -14); /* ditto */ in LibVEX_Init()
287 vassert(sdiv32(-100, -7) == 14); /* not sure what this proves */ in LibVEX_Init()
337 vassert(vex_initdone); in LibVEX_FrontEnd()
338 vassert(vta->needs_self_check != NULL); in LibVEX_FrontEnd()
339 vassert(vta->disp_cp_xassisted != NULL); in LibVEX_FrontEnd()
342 vassert(vta->disp_cp_chain_me_to_fastEP != NULL); in LibVEX_FrontEnd()
343 vassert(vta->disp_cp_xindir != NULL); in LibVEX_FrontEnd()
345 vassert(vta->disp_cp_chain_me_to_fastEP == NULL); in LibVEX_FrontEnd()
346 vassert(vta->disp_cp_xindir == NULL); in LibVEX_FrontEnd()
374 vassert(vta->archinfo_guest.endness == VexEndnessLE); in LibVEX_FrontEnd()
375 vassert(0 == sizeof(VexGuestX86State) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
376 vassert(sizeof( ((VexGuestX86State*)0)->guest_CMSTART) == 4); in LibVEX_FrontEnd()
377 vassert(sizeof( ((VexGuestX86State*)0)->guest_CMLEN ) == 4); in LibVEX_FrontEnd()
378 vassert(sizeof( ((VexGuestX86State*)0)->guest_NRADDR ) == 4); in LibVEX_FrontEnd()
391 vassert(vta->archinfo_guest.endness == VexEndnessLE); in LibVEX_FrontEnd()
392 vassert(0 == sizeof(VexGuestAMD64State) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
393 vassert(sizeof( ((VexGuestAMD64State*)0)->guest_CMSTART ) == 8); in LibVEX_FrontEnd()
394 vassert(sizeof( ((VexGuestAMD64State*)0)->guest_CMLEN ) == 8); in LibVEX_FrontEnd()
395 vassert(sizeof( ((VexGuestAMD64State*)0)->guest_NRADDR ) == 8); in LibVEX_FrontEnd()
408 vassert(vta->archinfo_guest.endness == VexEndnessBE); in LibVEX_FrontEnd()
409 vassert(0 == sizeof(VexGuestPPC32State) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
410 vassert(sizeof( ((VexGuestPPC32State*)0)->guest_CMSTART ) == 4); in LibVEX_FrontEnd()
411 vassert(sizeof( ((VexGuestPPC32State*)0)->guest_CMLEN ) == 4); in LibVEX_FrontEnd()
412 vassert(sizeof( ((VexGuestPPC32State*)0)->guest_NRADDR ) == 4); in LibVEX_FrontEnd()
425 vassert(vta->archinfo_guest.endness == VexEndnessBE || in LibVEX_FrontEnd()
427 vassert(0 == sizeof(VexGuestPPC64State) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
428 vassert(sizeof( ((VexGuestPPC64State*)0)->guest_CMSTART ) == 8); in LibVEX_FrontEnd()
429 vassert(sizeof( ((VexGuestPPC64State*)0)->guest_CMLEN ) == 8); in LibVEX_FrontEnd()
430 vassert(sizeof( ((VexGuestPPC64State*)0)->guest_NRADDR ) == 8); in LibVEX_FrontEnd()
431 vassert(sizeof( ((VexGuestPPC64State*)0)->guest_NRADDR_GPR2) == 8); in LibVEX_FrontEnd()
444 vassert(vta->archinfo_guest.endness == VexEndnessBE); in LibVEX_FrontEnd()
445 vassert(0 == sizeof(VexGuestS390XState) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
446 vassert(sizeof( ((VexGuestS390XState*)0)->guest_CMSTART ) == 8); in LibVEX_FrontEnd()
447 vassert(sizeof( ((VexGuestS390XState*)0)->guest_CMLEN ) == 8); in LibVEX_FrontEnd()
448 vassert(sizeof( ((VexGuestS390XState*)0)->guest_NRADDR ) == 8); in LibVEX_FrontEnd()
461 vassert(vta->archinfo_guest.endness == VexEndnessLE); in LibVEX_FrontEnd()
462 vassert(0 == sizeof(VexGuestARMState) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
463 vassert(sizeof( ((VexGuestARMState*)0)->guest_CMSTART) == 4); in LibVEX_FrontEnd()
464 vassert(sizeof( ((VexGuestARMState*)0)->guest_CMLEN ) == 4); in LibVEX_FrontEnd()
465 vassert(sizeof( ((VexGuestARMState*)0)->guest_NRADDR ) == 4); in LibVEX_FrontEnd()
478 vassert(vta->archinfo_guest.endness == VexEndnessLE); in LibVEX_FrontEnd()
479 vassert(0 == sizeof(VexGuestARM64State) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
480 vassert(sizeof( ((VexGuestARM64State*)0)->guest_CMSTART) == 8); in LibVEX_FrontEnd()
481 vassert(sizeof( ((VexGuestARM64State*)0)->guest_CMLEN ) == 8); in LibVEX_FrontEnd()
482 vassert(sizeof( ((VexGuestARM64State*)0)->guest_NRADDR ) == 8); in LibVEX_FrontEnd()
495 vassert(vta->archinfo_guest.endness == VexEndnessLE in LibVEX_FrontEnd()
497 vassert(0 == sizeof(VexGuestMIPS32State) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
498 vassert(sizeof( ((VexGuestMIPS32State*)0)->guest_CMSTART) == 4); in LibVEX_FrontEnd()
499 vassert(sizeof( ((VexGuestMIPS32State*)0)->guest_CMLEN ) == 4); in LibVEX_FrontEnd()
500 vassert(sizeof( ((VexGuestMIPS32State*)0)->guest_NRADDR ) == 4); in LibVEX_FrontEnd()
513 vassert(vta->archinfo_guest.endness == VexEndnessLE in LibVEX_FrontEnd()
515 vassert(0 == sizeof(VexGuestMIPS64State) % LibVEX_GUEST_STATE_ALIGN); in LibVEX_FrontEnd()
516 vassert(sizeof( ((VexGuestMIPS64State*)0)->guest_CMSTART) == 8); in LibVEX_FrontEnd()
517 vassert(sizeof( ((VexGuestMIPS64State*)0)->guest_CMLEN ) == 8); in LibVEX_FrontEnd()
518 vassert(sizeof( ((VexGuestMIPS64State*)0)->guest_NRADDR ) == 8); in LibVEX_FrontEnd()
541 vassert(vta->archinfo_guest.hwcaps == vta->archinfo_host.hwcaps); in LibVEX_FrontEnd()
543 vassert(vta->archinfo_guest.endness == vta->archinfo_host.endness); in LibVEX_FrontEnd()
555 vassert(*pxControl >= VexRegUpdSpAtMemAccess in LibVEX_FrontEnd()
588 vassert(vta->guest_extents->n_used >= 1 && vta->guest_extents->n_used <= 3); in LibVEX_FrontEnd()
589 vassert(vta->guest_extents->base[0] == vta->guest_bytes_addr); in LibVEX_FrontEnd()
591 vassert(vta->guest_extents->len[i] < 10000); /* sanity */ in LibVEX_FrontEnd()
595 vassert(*pxControl >= VexRegUpdSpAtMemAccess in LibVEX_FrontEnd()
757 vassert(vex_initdone); in libvex_BackEnd()
758 vassert(vta->disp_cp_xassisted != NULL); in libvex_BackEnd()
764 vassert(vta->disp_cp_chain_me_to_fastEP != NULL); in libvex_BackEnd()
765 vassert(vta->disp_cp_xindir != NULL); in libvex_BackEnd()
768 vassert(vta->disp_cp_chain_me_to_fastEP == NULL); in libvex_BackEnd()
769 vassert(vta->disp_cp_xindir == NULL); in libvex_BackEnd()
867 vassert(vta->archinfo_host.endness == VexEndnessLE); in libvex_BackEnd()
884 vassert(vta->archinfo_host.endness == VexEndnessLE); in libvex_BackEnd()
900 vassert(vta->archinfo_host.endness == VexEndnessBE); in libvex_BackEnd()
916 vassert(vta->archinfo_host.endness == VexEndnessBE || in libvex_BackEnd()
934 vassert(vta->archinfo_host.endness == VexEndnessBE); in libvex_BackEnd()
950 vassert(vta->archinfo_host.endness == VexEndnessLE); in libvex_BackEnd()
966 vassert(vta->archinfo_host.endness == VexEndnessLE); in libvex_BackEnd()
982 vassert(vta->archinfo_host.endness == VexEndnessLE in libvex_BackEnd()
999 vassert(vta->archinfo_host.endness == VexEndnessLE in libvex_BackEnd()
1045 vassert(irsb->offsIP >= 16); in libvex_BackEnd()
1132 vassert(vta->addProfInc); /* else where did it come from? */ in libvex_BackEnd()
1133 vassert(res->offs_profInc == -1); /* there can be only one (tm) */ in libvex_BackEnd()
1134 vassert(out_used >= 0); in libvex_BackEnd()
1234 vassert(0); in LibVEX_Chain()
1291 vassert(0); in LibVEX_UnChain()
1319 vassert(0); in LibVEX_evCheckSzB()
1359 vassert(0); in LibVEX_PatchProfInc()
1509 vassert(0); in arch_word_size()