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Lines Matching refs:GetCode

120   uint32_t GetCode() const { return (value_ & kCodeMask) >> kCodeShift; }  in GetCode()  function
140 VIXL_ASSERT(GetCode() < kNumberOfRegisters); in Register()
142 bool Is(Register ref) const { return GetCode() == ref.GetCode(); } in Is()
143 bool IsLow() const { return GetCode() < kNumberOfT32LowRegisters; } in IsLow()
144 bool IsLR() const { return GetCode() == kLrCode; } in IsLR()
145 bool IsPC() const { return GetCode() == kPcCode; } in IsPC()
146 bool IsSP() const { return GetCode() == kSpCode; } in IsSP()
159 uint32_t GetCode() const { return code_; } in GetCode() function
196 return ((GetCode() & 0x1) << single_bit_field) | in Encode()
197 ((GetCode() & 0x1e) >> 1); in Encode()
199 return ((GetCode() & 0x1) << single_bit_field) | in Encode()
200 ((GetCode() & 0x1e) << (four_bit_field_lowest_bit - 1)); in Encode()
216 return os << "s" << reg.GetCode();
227 VIXL_ASSERT(GetCode() * lane_count < kNumberOfSRegisters); in GetLane()
228 return SRegister(GetCode() * lane_count + lane); in GetLane()
232 return ((GetCode() & 0x10) << (single_bit_field - 4)) | in Encode()
233 ((GetCode() & 0xf) << four_bit_field_lowest_bit); in Encode()
246 return os << "d" << reg.GetCode();
328 : DRegister(reg.GetCode()), lane_(lane) {} in DRegisterLane()
335 uint32_t value = lane_ << ((dt.GetSize() == 16) ? 3 : 4) | GetCode(); in EncodeX()
358 os << "d" << lane.GetCode() << "[";
368 uint32_t Encode(int offset) { return GetCode() << offset; } in Encode()
372 return DRegister(GetCode() * lane_count + lane); in GetDLane()
374 DRegister GetLowDRegister() const { return DRegister(GetCode() * 2); } in GetLowDRegister()
375 DRegister GetHighDRegister() const { return DRegister(1 + GetCode() * 2); } in GetHighDRegister()
379 VIXL_ASSERT(GetCode() * lane_count < kNumberOfSRegisters); in GetSLane()
380 return SRegister(GetCode() * lane_count + lane); in GetSLane()
385 return ((GetCode() & 0x8) << (single_bit_field - 3)) | in Encode()
386 ((GetCode() & 0x7) << (four_bit_field_lowest_bit + 1)); in Encode()
399 return os << "q" << reg.GetCode();
531 return UINT32_C(1) << reg.GetCode();
622 return UINT64_C(0xf) << (reg.GetCode() * 4); in RegisterToList()
624 return UINT64_C(0x3) << (reg.GetCode() * 2); in RegisterToList()
626 return UINT64_C(0x1) << reg.GetCode(); in RegisterToList()
650 explicit SRegisterList(SRegister reg) : first_(reg.GetCode()), length_(1) {} in SRegisterList()
652 : first_(first.GetCode()), length_(length) { in SRegisterList()
658 return SRegister((first_.GetCode() + n) % kNumberOfSRegisters); in GetSRegister()
672 explicit DRegisterList(DRegister reg) : first_(reg.GetCode()), length_(1) {} in DRegisterList()
674 : first_(first.GetCode()), length_(length) { in DRegisterList()
680 return DRegister((first_.GetCode() + n) % kMaxNumberOfDRegisters); in GetDRegister()
702 : first_(reg.GetCode()), in NeonRegisterList()
710 : first_(reg.GetCode()), in NeonRegisterList()
721 : first_(first.GetCode()), spacing_(spacing), type_(type), lane_(-1) { in NeonRegisterList()
723 VIXL_ASSERT(first.GetCode() <= last.GetCode()); in NeonRegisterList()
725 int range = last.GetCode() - first.GetCode(); in NeonRegisterList()
735 : first_(first.GetCode()), in NeonRegisterList()
740 VIXL_ASSERT(first.GetCode() <= last.GetCode()); in NeonRegisterList()
742 int range = last.GetCode() - first.GetCode(); in NeonRegisterList()
751 unsigned code = first_.GetCode() + (IsDoubleSpaced() ? (2 * n) : n); in GetDRegister()
831 uint32_t GetCode() const { return reg_; } in GetCode() function
944 uint32_t GetCode() const { return code_; } in GetCode() function
949 return os << "c" << reg.GetCode();