504   void b(int64_t imm19, Condition cond);
516   void cbz(const Register& rt, int64_t imm19);
522   void cbnz(const Register& rt, int64_t imm19);
1099   void ldr(const CPURegister& rt, int64_t imm19);
1102   void ldrsw(const Register& xt, int64_t imm19);
1190   void prfm(PrefetchOperation op, int64_t imm19);
2665   static Instr ImmCondBranch(int64_t imm19) {  in ImmCondBranch()  argument
2666     VIXL_ASSERT(IsInt19(imm19));  in ImmCondBranch()
2667     return TruncateToUint19(imm19) << ImmCondBranch_offset;  in ImmCondBranch()
2670   static Instr ImmCmpBranch(int64_t imm19) {  in ImmCmpBranch()  argument
2671     VIXL_ASSERT(IsInt19(imm19));  in ImmCmpBranch()
2672     return TruncateToUint19(imm19) << ImmCmpBranch_offset;  in ImmCmpBranch()
2736   static Instr ImmLLiteral(int64_t imm19) {  in ImmLLiteral()  argument
2737     VIXL_ASSERT(IsInt19(imm19));  in ImmLLiteral()
2738     return TruncateToUint19(imm19) << ImmLLiteral_offset;  in ImmLLiteral()