13900   ASSERT_EQUAL_FP64(RawbitsToDouble((base_d >> kSRegSize) |  in TEST()
13901                                     ((2 * base_d) << kSRegSize)),  in TEST()
13905   ASSERT_EQUAL_FP32(RawbitsToFloat((4 * base_d) >> kSRegSize), s17);  in TEST()
13999   VIXL_CHECK(array[12] == ((1 * low_base) << kSRegSize));  in TEST()
14000   VIXL_CHECK(array[13] == (((2 * low_base) << kSRegSize) | (1 * high_base)));  in TEST()
14001   VIXL_CHECK(array[14] == (((3 * low_base) << kSRegSize) | (2 * high_base)));  in TEST()
14002   VIXL_CHECK(array[15] == (((4 * low_base) << kSRegSize) | (3 * high_base)));  in TEST()
14003   VIXL_CHECK(array[16] == (((1 * low_base) << kSRegSize) | (4 * high_base)));  in TEST()
14004   VIXL_CHECK(array[17] == (((2 * low_base) << kSRegSize) | (1 * high_base)));  in TEST()
14005   VIXL_CHECK(array[18] == (((3 * low_base) << kSRegSize) | (2 * high_base)));  in TEST()
14006   VIXL_CHECK(array[19] == (((4 * low_base) << kSRegSize) | (3 * high_base)));  in TEST()
14439                             kSRegSize,  in TEST()
14444                             kSRegSize,  in TEST()
14449                             kSRegSize,  in TEST()
14454                             kSRegSize,  in TEST()
14461                           kSRegSize,  in TEST()
14466                           kSRegSize,  in TEST()
14471                           kSRegSize,  in TEST()
14476                           kSRegSize,  in TEST()
23317     VRegister temp = temps.AcquireVRegisterOfSize(kSRegSize);  in TEST()