Lines Matching refs:Rm
215 int Rd, int Rm, int Rs, int Rn) { in MLA() argument
216 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MLA()
217 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn); in MLA()
219 (Rd<<16) | (Rn<<12) | (Rs<<8) | 0x90 | Rm; in MLA()
222 int Rd, int Rm, int Rs) { in MUL() argument
223 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; } in MUL()
224 LOG_FATAL_IF(Rd==Rm, "MUL(r%u,r%u,r%u)", Rd,Rm,Rs); in MUL()
225 *mPC++ = (cc<<28) | (s<<20) | (Rd<<16) | (Rs<<8) | 0x90 | Rm; in MUL()
228 int RdLo, int RdHi, int Rm, int Rs) { in UMULL() argument
229 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in UMULL()
230 "UMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in UMULL()
232 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm; in UMULL()
235 int RdLo, int RdHi, int Rm, int Rs) { in UMUAL() argument
236 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in UMUAL()
237 "UMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in UMUAL()
239 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm; in UMUAL()
242 int RdLo, int RdHi, int Rm, int Rs) { in SMULL() argument
243 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in SMULL()
244 "SMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in SMULL()
246 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm; in SMULL()
249 int RdLo, int RdHi, int Rm, int Rs) { in SMUAL() argument
250 LOG_FATAL_IF(RdLo==Rm || RdHi==Rm || RdLo==RdHi, in SMUAL()
251 "SMUAL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs); in SMUAL()
253 (RdHi<<16) | (RdLo<<12) | (Rs<<8) | 0x90 | Rm; in SMUAL()
341 void ARMAssembler::SWP(int cc, int Rn, int Rd, int Rm) { in SWP() argument
342 *mPC++ = (cc<<28) | (2<<23) | (Rn<<16) | (Rd << 12) | 0x90 | Rm; in SWP()
344 void ARMAssembler::SWPB(int cc, int Rn, int Rd, int Rm) { in SWPB() argument
345 *mPC++ = (cc<<28) | (2<<23) | (1<<22) | (Rn<<16) | (Rd << 12) | 0x90 | Rm; in SWPB()
363 void ARMAssembler::CLZ(int cc, int Rd, int Rm) in CLZ() argument
365 *mPC++ = (cc<<28) | 0x16F0F10| (Rd<<12) | Rm; in CLZ()
368 void ARMAssembler::QADD(int cc, int Rd, int Rm, int Rn) in QADD() argument
370 *mPC++ = (cc<<28) | 0x1000050 | (Rn<<16) | (Rd<<12) | Rm; in QADD()
373 void ARMAssembler::QDADD(int cc, int Rd, int Rm, int Rn) in QDADD() argument
375 *mPC++ = (cc<<28) | 0x1400050 | (Rn<<16) | (Rd<<12) | Rm; in QDADD()
378 void ARMAssembler::QSUB(int cc, int Rd, int Rm, int Rn) in QSUB() argument
380 *mPC++ = (cc<<28) | 0x1200050 | (Rn<<16) | (Rd<<12) | Rm; in QSUB()
383 void ARMAssembler::QDSUB(int cc, int Rd, int Rm, int Rn) in QDSUB() argument
385 *mPC++ = (cc<<28) | 0x1600050 | (Rn<<16) | (Rd<<12) | Rm; in QDSUB()
389 int Rd, int Rm, int Rs) in SMUL() argument
391 *mPC++ = (cc<<28) | 0x1600080 | (Rd<<16) | (Rs<<8) | (xy<<4) | Rm; in SMUL()
395 int Rd, int Rm, int Rs) in SMULW() argument
397 *mPC++ = (cc<<28) | 0x12000A0 | (Rd<<16) | (Rs<<8) | (y<<4) | Rm; in SMULW()
401 int Rd, int Rm, int Rs, int Rn) in SMLA() argument
403 *mPC++ = (cc<<28) | 0x1000080 | (Rd<<16) | (Rn<<12) | (Rs<<8) | (xy<<4) | Rm; in SMLA()
407 int RdHi, int RdLo, int Rs, int Rm) in SMLAL() argument
409 *mPC++ = (cc<<28) | 0x1400080 | (RdHi<<16) | (RdLo<<12) | (Rs<<8) | (xy<<4) | Rm; in SMLAL()
413 int Rd, int Rm, int Rs, int Rn) in SMLAW() argument
415 *mPC++ = (cc<<28) | 0x1200080 | (Rd<<16) | (Rn<<12) | (Rs<<8) | (y<<4) | Rm; in SMLAW()
423 void ARMAssembler::UXTB16(int cc, int Rd, int Rm, int rotate) in UXTB16() argument
425 *mPC++ = (cc<<28) | 0x6CF0070 | (Rd<<12) | ((rotate >> 3) << 10) | Rm; in UXTB16()
496 uint32_t ARMAssembler::reg_imm(int Rm, int type, uint32_t shift) in reg_imm() argument
498 return ((shift&0x1F)<<7) | ((type&0x3)<<5) | (Rm&0xF); in reg_imm()
501 uint32_t ARMAssembler::reg_rrx(int Rm) in reg_rrx() argument
503 return (ROR<<5) | (Rm&0xF); in reg_rrx()
506 uint32_t ARMAssembler::reg_reg(int Rm, int type, int Rs) in reg_reg() argument
508 return ((Rs&0xF)<<8) | ((type&0x3)<<5) | (1<<4) | (Rm&0xF); in reg_reg()
531 uint32_t ARMAssembler::reg_scale_pre(int Rm, int type, in reg_scale_pre() argument
535 (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) | in reg_scale_pre()
536 reg_imm(abs(Rm), type, shift); in reg_scale_pre()
539 uint32_t ARMAssembler::reg_scale_post(int Rm, int type, uint32_t shift) in reg_scale_post() argument
541 return (1<<25) | (((uint32_t(Rm)>>31)^1)<<23) | reg_imm(abs(Rm), type, shift); in reg_scale_post()
569 uint32_t ARMAssembler::reg_pre(int Rm, int W) in reg_pre() argument
571 return (1<<24) | (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) | (abs(Rm)&0xF); in reg_pre()
574 uint32_t ARMAssembler::reg_post(int Rm) in reg_post() argument
576 return (((uint32_t(Rm)>>31)^1)<<23) | (abs(Rm)&0xF); in reg_post()