~8( l(hisilicon,hi6220-hikeyhisilicon,hi6220 +7HiKey Development Boardpsci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D idle-statesHpscicpu-sleeparm,idle-stateUf}  cluster-sleeparm,idle-stateUf} cpu@0arm,cortex-a53arm,armv8cpupsci   +=L  \o7cpu@1arm,cortex-a53arm,armv8cpupsci  L  \cpu@2arm,cortex-a53arm,armv8cpupsci  L  \cpu@3arm,cortex-a53arm,armv8cpupsci  L  \cpu@100arm,cortex-a53arm,armv8cpupsci L  \cpu@101arm,cortex-a53arm,armv8cpupsci L  \cpu@102arm,cortex-a53arm,armv8cpupsci L  \cpu@103arm,cortex-a53arm,armv8cpupsci L  \  l2-cache0cache  l2-cache1cacheenergy-costssystem-cost0cluster-cost0(qn/3Kpkk/core-cost0(Eq}n3ocpu_opp_tableoperating-points-v2  opp00 eހ opp01ހ opp02+s@ opp0398p` opp04GKP interrupt-controller@f6801000 arm,gic-400@ @ `   timerarm,armv8-timer 0   soc simple-bus+sram@fff80000!hisilicon,hi6220-sramctrlsyscon ao_ctrl@f7800000hisilicon,hi6220-aoctrlsyscon #sys_ctrl@f7030000 hisilicon,hi6220-sysctrlsyscon #0media_ctrl@f4410000"hisilicon,hi6220-mediactrlsysconA#0ZZpm_ctrl@f7032000hisilicon,hi6220-pmctrlsyscon #acpu_sctrl@f6504000#hisilicon,hi6220-acpu-sctrlsysconP@#medianoc_ade@f4520000sysconR@YYstub_clockhisilicon,hi6220-stub-clk=#Wmbox-txb   uart@f8015000arm,pl011arm,primecellP $$$iuartclkapb_pclkuart@f7111000arm,pl011arm,primecell %iuartclkapb_pclkudefault ok)рbluetooth ti,wl1835-st  iext_clockuart@f7112000arm,pl011arm,primecell  &iuartclkapb_pclkudefaultok LS-UART0uart@f7113000arm,pl011arm,primecell0 'iuartclkapb_pclkudefaultok LS-UART1uart@f7114000arm,pl011arm,primecell@ (iuartclkapb_pclkudefault ! disableddma@f7370000hisilicon,k3-dma-1.07  T  hi6220_dmaokUUtimer@f8008000arm,sp804arm,primecellitimer1timer2apb_pclkrtc@f8003000arm,pl031arm,primecell0  % iapb_pclkrtc@f8004000arm,pl031arm,primecell@ & iapb_pclkpinmux@f7010000pinctrl-single|+& Dpa"P"X"`"h"p"x"""""""!"+"0"8"J"z"~""""udefault#$%&'..gpio-range{""boot_sel_pmx_func##emmc_pmx_funcP  $@@sd_pmx_func0  EEsd_pmx_idle0  HHsdio_pmx_func0(,048<MMsdio_pmx_idle0(,048<PPisp_pmx_func$(,048<@DHLPTX\`hkadc_ssi_pmx_funch$$codec_clk_pmx_funcl%%codec_pmx_func ptx|fm_pmx_func bt_pmx_func pwm_in_pmx_func&&bl_pwm_pmx_func''uart0_pmx_funcuart1_pmx_func uart2_pmx_func uart3_pmx_func uart4_pmx_func   uart5_pmx_funci2c0_pmx_func66i2c1_pmx_func88i2c2_pmx_func::spi0_pmx_func //pinmux@f7010800pinconf-single+& udefault()*+,boot_sel_cfg_funcp((hkadc_ssi_cfg_funclp))emmc_clk_cfg_func pAAemmc_cfg_funcH  $(pBBemmc_rst_cfg_func,pCCsd_clk_cfg_func 0pFFsd_clk_cfg_idle pIIsd_cfg_func(  pGGsd_cfg_idle( pJJsdio_clk_cfg_func4 pNNsdio_clk_cfg_idle4pQQsdio_cfg_func(8<@DHpOOsdio_cfg_idle(8<@DHpRRisp_cfg_func1x(,048<@DHLPX\`dpisp_cfg_idle148pisp_cfg_func2Tpcodec_clk_cfg_funcpp**codec_clk_cfg_idleppcodec_cfg_func1tpcodec_cfg_func2x|pcodec_cfg_idle2x|pfm_cfg_func pbt_cfg_func pbt_cfg_idle ppwm_in_cfg_funcp++bl_pwm_cfg_funcp,,uart0_cfg_func1puart0_cfg_func2puart1_cfg_func1puart1_cfg_func2puart2_cfg_func puart3_cfg_func puart4_cfg_func p!!uart5_cfg_funcpi2c0_cfg_funcp77i2c1_cfg_funcp99i2c2_cfg_funcp;;spi0_cfg_func p00pinmux@f8001800pinconf-singlex+& udefault-rstout_n_cfg_funcp--pmu_peri_en_cfg_funcpsysclk0_en_cfg_funcpjtag_tdo_cfg_func  prf_reset_cfg_funcptpgpio@f8011000arm,pl061arm,primecell 4 iapb_pclkO"PWR_HOLDDSI_SELUSB_HUB_RESET_NUSB_SELHDMI_PDWL_REG_ONPWRON_DET5V_HUB_EN22gpio@f8012000arm,pl061arm,primecell  5 iapb_pclk:"SD_DETHDMI_INTPMU_IRQ_NWL_HOST_WAKENCNCNCBT_REG_ONgpio@f8013000arm,pl061arm,primecell0 6 iapb_pclkB"GPIO-AGPIO-BGPIO-CGPIO-DGPIO-EUSB_ID_DETUSB_VBUS_DETGPIO-H33gpio@f8014000arm,pl061arm,primecell@ 72.P iapb_pclk%"GPIO3_0NCNCNCWLAN_ACTIVENCNCccgpio@f7020000arm,pl061arm,primecell 82.X iapb_pclk?"USER_LED1USER_LED2USER_LED3USER_LED4SD_SELNCNCBT_ACTIVEbbgpio@f7021000arm,pl061arm,primecell 92.` iapb_pclk?"NCNC[UART1_RxD][UART1_TxD][AUX_SSI1]NC[PCM_CLK][PCM_FS]gpio@f7022000arm,pl061arm,primecell  :2.h iapb_pclk="[SPI0_DIN][SPI0_DOUT][SPI0_CS][SPI0_SCLK]NCNCNCGPIO-G11gpio@f7023000arm,pl061arm,primecell0 ;2.p iapb_pclk$"NCNCNCNC[PCM_DI][PCM_DO]NCNCgpio@f7024000arm,pl061arm,primecell@ < 2.x. iapb_pclk"NC[CEC_CLK_19_2MHZ]NCgpio@f7025000arm,pl061arm,primecellP =2. iapb_pclk'"GPIO-JGPIO-LNCNCNCNC[ISP_CCLK0]55gpio@f7026000arm,pl061arm,primecell` > 2.. iapb_pclk?"BOOT_SEL[ISP_CCLK1]GPIO-IGPIO-KNCNC[I2C2_SDA][I2C2_SCL]44gpio@f7027000arm,pl061arm,primecellp ? 2.. iapb_pclk""[I2C3_SDA][I2C3_SCL]NCNCNCgpio@f7028000arm,pl061arm,primecell @ 2.!.+ iapb_pclk8"[BT_PCM_XFS][BT_PCM_DI][BT_PCM_DO]NCNCNCNCGPIO-F__gpio@f7029000arm,pl061arm,primecell A2.0 iapb_pclkh"[UART0_RX][UART0_TX][BT_UART1_CTS][BT_UART1_RTS][BT_UART1_RX][BT_UART1_TX][UART0_CTS][UART0_RTS]gpio@f702a000arm,pl061arm,primecell B2.8 iapb_pclkZ"[UART0_RxD][UART0_TxD][I2C0_SCL][I2C0_SDA][I2C1_SCL][I2C1_SDA][I2C2_SCL][I2C2_SDA]gpio@f702b000arm,pl061arm,primecell C02.J.z.~ iapb_pclk "NCgpio@f702c000arm,pl061arm,primecell D2. iapb_pclkgpio@f702d000arm,pl061arm,primecell E2. iapb_pclkgpio@f702e000arm,pl061arm,primecell F2. iapb_pclkgpio@f702f000arm,pl061arm,primecell G2. iapb_pclkspi@f7106000arm,pl022arm,primecell` 2>E iapb_pclkudefault/0P W1ok+spidev@0rohm,dh2228fv`  disabledspidev_dma@0rohm,dh2228fv` r disabledsensorhub@0nanohub`  2 3 3 3 1$:0T@@j disabledargonkey@0nanohubr`rp 3 3 4 5 1 3 3$:0T@@jH      disabledi2c@f7100000snps,designware-i2c , ,udefault67oki2c@f7101000snps,designware-i2c -,udefault89oki2c@f7102000snps,designware-i2c  .,udefault:;ok+adv7533@39 adi,adv75339  2ports+port@0endpoint<]]port@2endpoint=VVusbphyhisilicon,hi6220-usb-phy)>4??usb@f72c0000hisilicon,hi6220-usb,P? Uusb2-phyiotg_otggv< Mmailbox@f7510000hisilicon,hi6220-mbox Q ^dwmmc0@f723d000hisilicon,hi6220-dw-mshc# Hiciubiuresetudefault@ABCDdwmmc1@f723e000hisilicon,hi6220-dw-mshc4# I+iciubiureset udefaultidle EFG HIJ&3@KLM Xdwmmc2@f723f000hisilicon,hi6220-dw-mshc# Jiciubiureset udefaultidle MNO PQRSaT+wlcore@2 ti,wl1835 watchdog@f8005000arm,sp805-wdtarm,primecellP   iapb_pclktsensor@0,f7030700hisilicon,tsensor  ithermal_clklWWi2s@f7118000hisilicon,hi6210-i2s { 8idacodeci2s-baseUUrxtxportsport@0ddendpointVi2s==thermal-zonescls0d Wtripstrip-point@0passivetrip-point@1$passiveXXcooling-mapsmap0X ade@f4100000hisilicon,hi6220-adex &ade_base0YZ sZZZ(iclk_ade_coreclk_codec_jpegclk_ade_pixZZu**Eokportendpoint[\\dsi@f4107800hisilicon,hi6220-dsixZipclkokports+port@0endpoint\[[port@1endpoint@0]<<debug@f6590000&arm,coresight-cpu-debugarm,primecellY; iapb_pclkDdebug@f6592000&arm,coresight-cpu-debugarm,primecellY ; iapb_pclkDdebug@f6594000&arm,coresight-cpu-debugarm,primecellY@; iapb_pclkDdebug@f6596000&arm,coresight-cpu-debugarm,primecellY`; iapb_pclkDdebug@f65d0000&arm,coresight-cpu-debugarm,primecell]; iapb_pclkDdebug@f65d2000&arm,coresight-cpu-debugarm,primecell] ; iapb_pclkDdebug@f65d4000&arm,coresight-cpu-debugarm,primecell]@; iapb_pclkDdebug@f65d6000&arm,coresight-cpu-debugarm,primecell]`; iapb_pclkD mali@f4080000arm,mali-450arm,mali-utgard?pZZiclk_g3dpclk_g3dR`jt ~~~~~~~~~~~~~~~~IRQGPIRQGPMMUIRQPPIRQPMUIRQPP0IRQPPMMU0IRQPP1IRQPPMMU1IRQPP2IRQPPMMU2IRQPP4IRQPPMMU4IRQPP5IRQPPMMU5IRQPP6IRQPPMMU6aliases/soc/uart@f8015000/soc/uart@f7111000/soc/uart@f7112000/soc/uart@f7113000/soc/spi@f7106000chosenserial3:115200n8fiq-debuggerandroid,irq-hi6220-uart0 ' fiqsignaluart_overlay@0fragment@0/soc/uart@f7113000__overlay__ disabledoverlay_mgrlinux,overlay_managerhardware_cfg_innolux_paneloverlay_0fragment@0/soc/dsi@f4107800__overlay__+ports+port@1+endpoint@1^``panel@1innolux,n070icn-pb1 2 d !d ,: ;g K3 W3 b_portendpoint`^^hardware_cfg_spidev0overlay_0fragment@0/soc/spi@f7106000/spidev@0__overlay__okhardware_cfg_spidev_dma0overlay_0fragment@0/soc/spi@f7106000/spidev_dma@0__overlay__okhardware_cfg_neonkeyoverlay_0fragment@0/soc/spi@f7106000/sensorhub@0__overlay__okhardware_cfg_argonkeyoverlay_0fragment@0/soc/spi@f7106000/argonkey@0__overlay__okhardware_cfg_disable_btoverlay_0fragment@0/soc/uart@f7111000/bluetooth__overlay__ disabledhardware_cfg_cs_sd_qboverlay_0fragment@0/soc/gpio@f7020000__overlay__sd_sel k t gpio_sd_selmemory@0memory` `A"reserved-memory+ramoops@0x21f00000ramoops!   linux,cmashared-dma-pool q reboot-mode-syscon@5f01000sysconsimple-mfdreboot-modesyscon-reboot-mode  wfU wfU wfUregulator@0regulator-fixed SYS_5V LK@ "LK@ : Laaregulator@1regulator-fixed VDD_3V3 2Z "2Z : L `aSSregulator@2regulator-fixed 5V_HUB LK@ "LK@ : 2 L `a>>wl1835-pwrseqmmc-pwrseq-simple k2 iext_clock w TTleds gpio-ledsuser_led4 user_led4 b heartbeatuser_led3 user_led3 b mmc0user_led2 user_led2 b mmc1user_led1 user_led1 b cpu0wlan_active_led wifi_active c phy0tx offbt_active_led bt_active b hci0rx offpmic@f8000000hisilicon,hi655x-pmic# regulatorsLDO2 LDO2_2V8 &% "0 xLDO7 LDO7_SDIO w@ "2Z xKKLDO10 LDO10_2V85 w@ "- hLLLDO13 LDO13_1V8 j "0 xLDO14 LDO14_2V8 &% "0 xLDO15 LDO15_1V8 j "0 : L xLDO17 LDO17_2V5 &% "0 xLDO19 LDO19_3V0 w@ "- hDDLDO21 LDO21_1V8 -P " L xLDO22 LDO22_1V2  "O : L xfirmwareopteelinaro,optee-tz=smcsound_cardaudio-graph-card d compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpuentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslinux,phandlewakeup-latency-usdevice_typeregenable-methodnext-level-cacheclocksoperating-points-v2cooling-min-levelcooling-max-level#cooling-cellscpu-idle-statessched-energy-costsdynamic-power-coefficientcapacity-dmips-mhzbusy-cost-dataidle-cost-dataopp-sharedopp-hzopp-microvoltclock-latency-ns#interrupt-cellsinterrupt-controllerinterruptsranges#clock-cells#reset-cellshisilicon,hi6220-clk-srammbox-namesmboxesclock-namespinctrl-namespinctrl-0statusassigned-clocksassigned-clock-ratesenable-gpioslabel#dma-cellsdma-channelsdma-requestsdma-no-ccidma-type#pinctrl-cells#gpio-range-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-range#pinctrl-single,gpio-range-cellspinctrl-single,pinspinctrl-single,bias-pulldownpinctrl-single,bias-pulluppinctrl-single,drive-strengthgpio-controller#gpio-cellsgpio-line-namesgpio-rangesbus-idenable-dmanum-cscs-gpiosspi-max-frequencypl022,com-modepl022,rx-level-trigspi-cpolspi-cphasensorhub,nreset-gpiosensorhub,boot0-gpiosensorhub,wakeup-gpiosensorhub,irq1-gpiosensorhub,spi-cs-gpiosensorhub,bl-addrsensorhub,kernel-addrsensorhub,num-flash-bankssensorhub,flash-bankssensorhub,shared-addrsensorhub,num-shared-flash-bankssensorhub,shared-flash-bankssensorhub,irq2-gpioi2c-sda-hold-time-nspd-gpioadi,dsi-lanes#sound-dai-cellsremote-endpoint#phy-cellsphy-supplyhisilicon,peripheral-sysconphysphy-namesdr_modeg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-size#mbox-cellsresetsreset-namescap-mmc-highspeednon-removablebus-widthvmmc-supplypinctrl-1card-detect-delaycap-sd-highspeedsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50vqmmc-supplydisable-wpcd-gpiosmmc-pwrseq#thermal-sensor-cellsdmasdma-nameshisilicon,sysctrl-syscondai-formatpolling-delaypolling-delay-passivesustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicereg-nameshisilicon,noc-syscondma-coherentmali_def_freqpclk_freqdfs_stepsdfs_lockprfdfs_limit_max_prfdfs_profile_numdfs_profilesmali_typeinterrupt-namesserial0serial1serial2serial3spi0stdout-pathtarget-pathpower-on-delayreset-delayinit-delaypanel-width-mmpanel-height-mmpwr-en-gpiobl-en-gpiopwm-gpiogpio-hogoutput-highline-namerecord-sizeconsole-sizeftrace-sizereusablelinux,cma-defaultoffsetmode-normalmode-bootloadermode-recoveryregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onvin-supplyreset-gpiospower-off-delay-uslinux,default-triggerdefault-statepmic-gpiosregulator-enable-ramp-delaydais