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1 #ifndef ARCH_IA64_H
2 #define ARCH_IA64_H
3 
4 #define FIO_ARCH	(arch_ia64)
5 
6 #define nop		asm volatile ("hint @pause" ::: "memory");
7 #define read_barrier()	asm volatile ("mf" ::: "memory")
8 #define write_barrier()	asm volatile ("mf" ::: "memory")
9 
10 #define ia64_popcnt(x)							\
11 ({									\
12 	unsigned long ia64_intri_res;					\
13 	asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x));		\
14 	ia64_intri_res;							\
15 })
16 
arch_ffz(unsigned long bitmask)17 static inline unsigned long arch_ffz(unsigned long bitmask)
18 {
19 	return ia64_popcnt(bitmask & (~bitmask - 1));
20 }
21 
get_cpu_clock(void)22 static inline unsigned long long get_cpu_clock(void)
23 {
24 	unsigned long long ret;
25 
26 	__asm__ __volatile__("mov %0=ar.itc" : "=r" (ret) : : "memory");
27 	return ret;
28 }
29 
30 #define ARCH_HAVE_INIT
31 extern int tsc_reliable;
arch_init(char * envp[])32 static inline int arch_init(char *envp[])
33 {
34 	tsc_reliable = 1;
35 	return 0;
36 }
37 
38 #define ARCH_HAVE_FFZ
39 #define ARCH_HAVE_CPU_CLOCK
40 
41 #endif
42