1 2 /*--------------------------------------------------------------------*/ 3 /*--- begin guest_generic_bb_to_IR.h ---*/ 4 /*--------------------------------------------------------------------*/ 5 6 /* 7 This file is part of Valgrind, a dynamic binary instrumentation 8 framework. 9 10 Copyright (C) 2004-2017 OpenWorks LLP 11 info@open-works.net 12 13 This program is free software; you can redistribute it and/or 14 modify it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 2 of the 16 License, or (at your option) any later version. 17 18 This program is distributed in the hope that it will be useful, but 19 WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21 General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with this program; if not, write to the Free Software 25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 26 02110-1301, USA. 27 28 The GNU General Public License is contained in the file COPYING. 29 30 Neither the names of the U.S. Department of Energy nor the 31 University of California nor the names of its contributors may be 32 used to endorse or promote products derived from this software 33 without prior written permission. 34 */ 35 36 #ifndef __VEX_GUEST_GENERIC_BB_TO_IR_H 37 #define __VEX_GUEST_GENERIC_BB_TO_IR_H 38 39 #include "libvex_basictypes.h" 40 #include "libvex_ir.h" // IRJumpKind 41 #include "libvex.h" // VexArch 42 43 /* This defines stuff needed by the guest insn disassemblers. 44 It's a bit circular; is imported by 45 - the guest-specific toIR.c files (guest-{x86,amd64,ppc,arm}/toIR.c) 46 - the generic disassembly driver (bb_to_IR.c) 47 - vex_main.c 48 */ 49 50 51 /* --------------------------------------------------------------- 52 Result of disassembling an instruction 53 --------------------------------------------------------------- */ 54 55 /* The results of disassembling an instruction. There are three 56 possible outcomes. For Dis_Resteer, the disassembler _must_ 57 continue at the specified address. For Dis_StopHere, the 58 disassembler _must_ terminate the BB. For Dis_Continue, we may at 59 our option either disassemble the next insn, or terminate the BB; 60 but in the latter case we must set the bb's ->next field to point 61 to the next instruction. */ 62 63 typedef 64 65 struct { 66 67 /* The disassembled insn has this length. Must always be 68 set. */ 69 UInt len; 70 71 /* What happens next? 72 Dis_StopHere: this insn terminates the BB; we must stop. 73 Dis_Continue: we can optionally continue into the next insn 74 Dis_ResteerU: followed an unconditional branch; continue at 75 'continueAt' 76 Dis_ResteerC: (speculatively, of course) followed a 77 conditional branch; continue at 'continueAt' 78 */ 79 enum { Dis_StopHere=0x10, Dis_Continue, 80 Dis_ResteerU, Dis_ResteerC } whatNext; 81 82 /* Any other hints that we should feed back to the disassembler? 83 Dis_HintNone: no hint 84 Dis_HintVerbose: this insn potentially generates a lot of code 85 */ 86 enum { Dis_HintNone=0x20, Dis_HintVerbose } hint; 87 88 /* For whatNext==Dis_StopHere, we need to end the block and create a 89 transfer to whatever the NIA is. That will have presumably 90 been set by the IR generated for this insn. So we need to 91 know the jump kind to use. Should Ijk_INVALID in other Dis_ 92 cases. */ 93 IRJumpKind jk_StopHere; 94 95 /* For Dis_Resteer, this is the guest address we should continue 96 at. Otherwise ignored (should be zero). */ 97 Addr continueAt; 98 } 99 100 DisResult; 101 102 103 /* --------------------------------------------------------------- 104 The type of a function which disassembles one instruction. 105 C's function-type syntax is really astonishing bizarre. 106 --------------------------------------------------------------- */ 107 108 /* A function of this type (DisOneInstrFn) disassembles an instruction 109 located at host address &guest_code[delta], whose guest IP is 110 guest_IP (this may be entirely unrelated to where the insn is 111 actually located in the host's address space.). The returned 112 DisResult.len field carries its size. If the returned 113 DisResult.whatNext field is Dis_Resteer then DisResult.continueAt 114 should hold the guest IP of the next insn to disassemble. 115 116 disInstr is not permitted to return Dis_Resteer if resteerOkFn, 117 when applied to the address which it wishes to resteer into, 118 returns False. 119 120 The resulting IR is added to the end of irbb. 121 */ 122 123 typedef 124 125 DisResult (*DisOneInstrFn) ( 126 127 /* This is the IRSB to which the resulting IR is to be appended. */ 128 /*OUT*/ IRSB* irbb, 129 130 /* Return True iff resteering to the given addr is allowed (for 131 branches/calls to destinations that are known at JIT-time) */ 132 /*IN*/ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ), 133 134 /* Should we speculatively resteer across conditional branches? 135 (Experimental and not enabled by default). The strategy is 136 to assume that backward branches are taken and forward 137 branches are not taken. */ 138 /*IN*/ Bool resteerCisOk, 139 140 /* Vex-opaque data passed to all caller (valgrind) supplied 141 callbacks. */ 142 /*IN*/ void* callback_opaque, 143 144 /* Where is the guest code? */ 145 /*IN*/ const UChar* guest_code, 146 147 /* Where is the actual insn? Note: it's at &guest_code[delta] */ 148 /*IN*/ Long delta, 149 150 /* What is the guest IP of the insn? */ 151 /*IN*/ Addr guest_IP, 152 153 /* Info about the guest architecture */ 154 /*IN*/ VexArch guest_arch, 155 /*IN*/ const VexArchInfo* archinfo, 156 157 /* ABI info for both guest and host */ 158 /*IN*/ const VexAbiInfo* abiinfo, 159 160 /* The endianness of the host */ 161 /*IN*/ VexEndness host_endness, 162 163 /* Should diagnostics be printed for illegal instructions? */ 164 /*IN*/ Bool sigill_diag 165 166 ); 167 168 169 /* --------------------------------------------------------------- 170 Top-level BB to IR conversion fn. 171 --------------------------------------------------------------- */ 172 173 /* See detailed comment in guest_generic_bb_to_IR.c. */ 174 extern 175 IRSB* bb_to_IR ( 176 /*OUT*/VexGuestExtents* vge, 177 /*OUT*/UInt* n_sc_extents, 178 /*OUT*/UInt* n_guest_instrs, /* stats only */ 179 /*MOD*/VexRegisterUpdates* pxControl, 180 /*IN*/ void* callback_opaque, 181 /*IN*/ DisOneInstrFn dis_instr_fn, 182 /*IN*/ const UChar* guest_code, 183 /*IN*/ Addr guest_IP_bbstart, 184 /*IN*/ Bool (*chase_into_ok)(void*,Addr), 185 /*IN*/ VexEndness host_endness, 186 /*IN*/ Bool sigill_diag, 187 /*IN*/ VexArch arch_guest, 188 /*IN*/ const VexArchInfo* archinfo_guest, 189 /*IN*/ const VexAbiInfo* abiinfo_both, 190 /*IN*/ IRType guest_word_type, 191 /*IN*/ UInt (*needs_self_check) 192 (void*, /*MB_MOD*/VexRegisterUpdates*, 193 const VexGuestExtents*), 194 /*IN*/ Bool (*preamble_function)(void*,IRSB*), 195 /*IN*/ Int offB_GUEST_CMSTART, 196 /*IN*/ Int offB_GUEST_CMLEN, 197 /*IN*/ Int offB_GUEST_IP, 198 /*IN*/ Int szB_GUEST_IP 199 ); 200 201 202 #endif /* ndef __VEX_GUEST_GENERIC_BB_TO_IR_H */ 203 204 /*--------------------------------------------------------------------*/ 205 /*--- end guest_generic_bb_to_IR.h ---*/ 206 /*--------------------------------------------------------------------*/ 207