| /external/v8/src/regexp/arm64/ |
| D | regexp-macro-assembler-arm64.cc | 289 __ Lsr(x11, GetCachedRegister(start_reg), kWRegSizeInBits); in CheckNotBackReferenceIgnoreCase() local
450 __ Lsr(x11, GetCachedRegister(start_reg), kWRegSizeInBits); in CheckNotBackReference() local
878 __ Lsr(capture_end.X(), capture_start.X(), kWRegSizeInBits); in GetCode() local
1200 __ Lsr(current_input_offset().X(), cached_register, kWRegSizeInBits); in ReadCurrentPositionFromRegister() local
1515 __ Lsr(maybe_result.X(), GetCachedRegister(register_index), in GetRegister() local
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 919 void MacroAssembler::Lsr(const Register& rd, in Lsr() function
928 void MacroAssembler::Lsr(const Register& rd, in Lsr() function
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| D | code-stubs-arm64.cc | 758 __ Lsr(exponent_abs, exponent_abs, 1); in Generate() local
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| /external/v8/src/crankshaft/arm64/ |
| D | lithium-codegen-arm64.cc | 4492 __ Lsr(result, left, right); in DoShiftI() local
4514 case Token::SHR: __ Lsr(result, left, shift_count); break; in DoShiftI() local
4554 __ Lsr(result, left, result); in DoShiftS() local
4587 __ Lsr(result, left, shift_count); in DoShiftS() local
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 1617 void Lsr(const Register& rd, const Register& rn, unsigned shift) { in Lsr() function
1624 void Lsr(const Register& rd, const Register& rn, const Register& rm) { in Lsr() function
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| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 1489 __ Lsr(i.OutputRegister(), i.OutputRegister(), 32); in AssembleArchInstruction() local
|
| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 9505 __ Lsr(x16, x0, x1); in TEST() local
9506 __ Lsr(x17, x0, x2); in TEST() local
9507 __ Lsr(x18, x0, x3); in TEST() local
9508 __ Lsr(x19, x0, x4); in TEST() local
9509 __ Lsr(x20, x0, x5); in TEST() local
9510 __ Lsr(x21, x0, x6); in TEST() local
9512 __ Lsr(w22, w0, w1); in TEST() local
9513 __ Lsr(w23, w0, w2); in TEST() local
9514 __ Lsr(w24, w0, w3); in TEST() local
9515 __ Lsr(w25, w0, w4); in TEST() local
[all …]
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 399 Lsr, enumerator
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| /external/v8/src/full-codegen/arm64/ |
| D | full-codegen-arm64.cc | 1547 __ Lsr(x10, left, right); in EmitInlineSmiBinaryOp() local
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| /external/vixl/test/aarch32/ |
| D | test-assembler-aarch32.cc | 784 __ Lsr(r4, r1, 8); in TEST() local
810 __ Lsr(r4, r1, r9); in TEST() local
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| /external/v8/src/builtins/arm64/ |
| D | builtins-arm64.cc | 1110 __ Lsr(x11, x11, kPointerSizeLog2); in Generate_InterpreterEntryTrampoline() local
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 2318 void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) { in Lsr() function
2335 void Lsr(Register rd, Register rm, const Operand& operand) { in Lsr() function
2338 void Lsr(FlagsUpdate flags, in Lsr() function
2364 void Lsr(FlagsUpdate flags, in Lsr() function
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