| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 40 const char *RegName = getRegisterName(RegNo); in printRegName() local
414 static const char *stripRegisterPrefix(const char *RegName) { in stripRegisterPrefix()
436 const char *RegName = getRegisterName(Op.getReg()); in printOperand() local
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 235 static const char *stripRegisterPrefix(const char *RegName) { in stripRegisterPrefix()
250 const char *RegName = getRegisterName(Op.getReg()); in printOperand() local
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/ |
| D | X86IntelInstPrinter.cpp | 77 static void PrintRegName(raw_ostream &O, StringRef RegName) { in PrintRegName()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCAsmPrinter.cpp | 133 static const char *stripRegisterPrefix(const char *RegName) { in stripRegisterPrefix()
150 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); in printOperand() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCAsmPrinter.cpp | 150 static const char *stripRegisterPrefix(const char *RegName) { in stripRegisterPrefix()
172 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); in printOperand() local
275 const char *RegName = "r0"; in PrintAsmMemoryOperand() local
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| /external/capstone/arch/PowerPC/ |
| D | PPCInstPrinter.c | 627 static char *stripRegisterPrefix(char *RegName) in stripRegisterPrefix()
651 char *RegName = getRegisterName(reg); in printOperand() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLowering.cpp | 152 void splitToClassAndName(const std::string &RegName, std::string *SplitRegClass, in splitToClassAndName()
224 for (const auto &RegName : BadRegNames) in filterTypeToRegisterSet() local
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| D | IceAssemblerMIPS32.cpp | 164 const char *RegName, const char *InstName) { in encodeRegister()
172 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName, in encodeGPRegister()
177 IValueT encodeFPRegister(const Operand *OpReg, const char *RegName, in encodeFPRegister()
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| D | IceAssemblerARM32.cpp | 541 const char *RegName, const char *InstName) { in encodeRegister()
549 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName, in encodeGPRegister()
554 IValueT encodeSRegister(const Operand *OpReg, const char *RegName, in encodeSRegister()
559 IValueT encodeDRegister(const Operand *OpReg, const char *RegName, in encodeDRegister()
564 IValueT encodeQRegister(const Operand *OpReg, const char *RegName, in encodeQRegister()
586 void verifyRegNotPc(IValueT Reg, const char *RegName, const char *InstName) { in verifyRegNotPc()
590 void verifyAddrRegNotPc(IValueT RegShift, IValueT Address, const char *RegName, in verifyAddrRegNotPc()
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| D | IceTargetLoweringX86Base.h | 198 const std::string RegName = Traits::getRegName(Dest->getRegNum()); in createGetIPForRegister() local
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| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 772 static unsigned getSpecialRegForName(StringRef RegName) { in getSpecialRegForName()
829 StringRef RegName = Parser.getTok().getString(); in ParseAMDGPURegister() local
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| /external/clang/include/clang/Basic/ |
| D | TargetInfo.h | 691 virtual bool validateGlobalRegisterVariable(StringRef RegName, in validateGlobalRegisterVariable()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 200 unsigned LanaiTargetLowering::getRegisterByName(const char *RegName, EVT VT, in getRegisterByName()
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| /external/llvm/lib/CodeGen/MIRParser/ |
| D | MIParser.cpp | 1879 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) { in getRegisterByName()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2753 StringRef RegName(Constraint.data()+1, Constraint.size()-2); in getRegForInlineAsmConstraint() local
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | AsmMatcherEmitter.cpp | 812 StringRef RegName = Tok.substr(Info.RegisterPrefix.size()); in getSingletonRegisterForAsmOperand() local
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| /external/clang/lib/CodeGen/ |
| D | CGExpr.cpp | 1571 llvm::MDNode *RegName = cast<llvm::MDNode>( in EmitLoadOfGlobalRegLValue() local
1823 llvm::MDNode *RegName = cast<llvm::MDNode>( in EmitStoreThroughGlobalRegLValue() local
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 1104 std::string RegName = IsSI ? "ES:(R|E)SI" : "ES:(R|E)DI"; in VerifyAndAdjustOperands() local
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| /external/llvm/utils/TableGen/ |
| D | AsmMatcherEmitter.cpp | 888 StringRef RegName = Tok.substr(RegisterPrefix.size()); in extractSingletonRegisterForAsmOperand() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2351 StringRef RegName(Constraint.data()+1, Constraint.size()-2); in getRegForInlineAsmConstraint() local
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| D | SelectionDAGBuilder.cpp | 4777 SDValue RegName = in visitIntrinsicCall() local
4790 SDValue RegName = in visitIntrinsicCall() local
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| /external/clang/lib/Basic/ |
| D | Targets.cpp | 2640 bool validateGlobalRegisterVariable(StringRef RegName, in validateGlobalRegisterVariable()
4385 bool validateGlobalRegisterVariable(StringRef RegName, in validateGlobalRegisterVariable()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 1029 unsigned SITargetLowering::getRegisterByName(const char* RegName, EVT VT, in getRegisterByName()
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 2690 virtual unsigned getRegisterByName(const char* RegName, EVT VT, in getRegisterByName()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1030 unsigned SparcTargetLowering::getRegisterByName(const char* RegName, EVT VT, in getRegisterByName()
|