/external/capstone/arch/ARM/ |
D | ARMDisassembler.c | 1375 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeCopMemInstruction() local 1518 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeAddrMode2IdxInstruction() local 1625 unsigned Rn = fieldFromInstruction_4(Val, 13, 4); in DecodeSORegMemOperand() local 1669 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeAddrMode3Instruction() local 1861 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeRFEInstruction() local 1893 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeQADDInstruction() local 1915 unsigned Rn = fieldFromInstruction_4(Insn, 16, 4); in DecodeMemMultipleWritebackInstruction() local 2148 unsigned Rn = fieldFromInstruction_4(Insn, 0, 4); in DecodeSMLAInstruction() local 2178 unsigned Rn = fieldFromInstruction_4(Val, 13, 4); in DecodeAddrModeImm12Operand() local 2197 unsigned Rn = fieldFromInstruction_4(Val, 9, 4); in DecodeAddrMode5Operand() local [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1189 unsigned Rn = fieldFromInstruction32(Insn, 16, 4); in DecodeCopMemInstruction() local 1340 unsigned Rn = fieldFromInstruction32(Insn, 16, 4); in DecodeAddrMode2IdxInstruction() local 1443 unsigned Rn = fieldFromInstruction32(Val, 13, 4); in DecodeSORegMemOperand() local 1485 unsigned Rn = fieldFromInstruction32(Insn, 16, 4); in DecodeAddrMode3Instruction() local 1595 unsigned Rn = fieldFromInstruction32(Insn, 16, 4); in DecodeRFEInstruction() local 1625 unsigned Rn = fieldFromInstruction32(Insn, 16, 4); in DecodeMemMultipleWritebackInstruction() local 1840 unsigned Rn = fieldFromInstruction32(Insn, 0, 4); in DecodeSMLAInstruction() local 1869 unsigned Rn = fieldFromInstruction32(Val, 13, 4); in DecodeAddrModeImm12Operand() local 1887 unsigned Rn = fieldFromInstruction32(Val, 9, 4); in DecodeAddrMode5Operand() local 1962 unsigned Rn = fieldFromInstruction32(Insn, 16, 4); in DecodeVLDInstruction() local [all …]
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1329 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeCopMemInstruction() local 1475 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode2IdxInstruction() local 1580 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeSORegMemOperand() local 1625 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeAddrMode3Instruction() local 1815 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeRFEInstruction() local 1846 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeQADDInstruction() local 1868 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeMemMultipleWritebackInstruction() local 2122 unsigned Rn = fieldFromInstruction(Insn, 0, 4); in DecodeSMLAInstruction() local 2150 unsigned Rn = fieldFromInstruction(Insn, 16, 4); in DecodeTSTInstruction() local 2200 unsigned Rn = fieldFromInstruction(Val, 13, 4); in DecodeAddrModeImm12Operand() local [all …]
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/external/capstone/arch/AArch64/ |
D | AArch64Disassembler.c | 739 unsigned Rn = fieldFromInstruction(Insn, 5, 5); in DecodeFMOVLaneInstruction() local 844 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeThreeAddrSRegInstruction() local 944 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeUnsignedLdStInstruction() local 1008 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeSignedLdStInstruction() local 1194 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeExclusiveLdStInstruction() local 1270 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodePairLdStInstruction() local 1398 unsigned Rd, Rn, Rm; in DecodeAddSubERegInstruction() local 1459 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeLogicalImmInstruction() local 1568 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeBaseAddSubImm() local
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 653 unsigned Rn = fieldFromInstruction(Insn, 5, 5); in DecodeFMOVLaneInstruction() local 744 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeThreeAddrSRegInstruction() local 839 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeUnsignedLdStInstruction() local 900 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeSignedLdStInstruction() local 1085 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeExclusiveLdStInstruction() local 1168 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodePairLdStInstruction() local 1297 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeAddSubERegInstruction() local 1354 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeLogicalImmInstruction() local 1460 unsigned Rn = fieldFromInstruction(insn, 5, 5); in DecodeBaseAddSubImm() local
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 135 IValueT encodeGPRRegister(RegARM32::GPRRegister Rn) { in encodeGPRRegister() 436 IValueT encodeImmRegOffsetEnc3(IValueT Rn, IOffsetT Imm8, in encodeImmRegOffsetEnc3() 501 IValueT Rn = getEncodedGPRegNum(Var); in encodeAddress() local 795 IValueT Opcode, bool SetFlags, IValueT Rn, in emitType01() 819 IValueT Rn = encodeGPRegister(OpRn, "Rn", InstName); in emitType01() local 824 IValueT Rd, IValueT Rn, const Operand *OpSrc1, in emitType01() 929 IValueT Rn = encodeGPRegister(OpRn, "Rn", InstName); in emitCompareOp() local 961 RegARM32::GPRRegister Rn = getGPRReg(kRnShift, Address); in emitMemOp() local 983 RegARM32::GPRRegister Rn = getGPRReg(kRnShift, Address); in emitMemOp() local 1043 const RegARM32::GPRRegister Rn = getGPRReg(kRnShift, Address); in emitMemOpEnc3() local [all …]
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/external/v8/src/arm/ |
D | disasm-arm.cc | 418 void Decoder::FormatNeonMemory(int Rn, int align, int Rm) { in FormatNeonMemory() 2288 int Rn = instr->VnValue(); in DecodeSpecialCondition() local 2301 int Rn = instr->VnValue(); in DecodeSpecialCondition() local 2318 int Rn = instr->Bits(19, 16); in DecodeSpecialCondition() local
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D | simulator-arm.cc | 5279 int Rn = instr->VnValue(); in DecodeSpecialCondition() local 5320 int Rn = instr->VnValue(); in DecodeSpecialCondition() local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 692 unsigned Rn = getARMRegisterNumbering(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local 896 unsigned Rn = getARMRegisterNumbering(MO.getReg()); in getLdStSORegOpValue() local 927 unsigned Rn = getARMRegisterNumbering(MO.getReg()); in getAddrMode2OpValue() local 996 unsigned Rn = getARMRegisterNumbering(MO.getReg()); in getAddrMode3OpValue() local 1031 unsigned Rn = getARMRegisterNumbering(MO.getReg()); in getAddrModeISOpValue() local
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 865 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local 1072 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() local 1169 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrMode3OpValue() local 1179 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OpValue() local 1216 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeISOpValue() local
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2908 unsigned Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local 2934 unsigned Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2944 unsigned Rn = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local 2981 unsigned Rn = MI.getOperand(2).getReg(); in getNumMicroOpsSwiftLdSt() local
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D | Thumb2SizeReduction.cpp | 438 unsigned Rn = MI->getOperand(IsStore ? 0 : 1).getReg(); in ReduceLoadStore() local
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 3451 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 3497 unsigned Rn = Inst.getOperand(3).getReg(); in validateInstruction() local 3529 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local 3548 unsigned Rn = Inst.getOperand(2).getReg(); in validateInstruction() local
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 6245 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg()); in validateInstruction() local 6306 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local 6329 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local 6354 unsigned Rn = Inst.getOperand(0).getReg(); in validateInstruction() local 8449 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local 8473 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 4090 unsigned Rn = Inst.getOperand(0).getReg(); in validateInstruction() local 4222 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local 4245 unsigned Rn = Inst.getOperand(0).getReg(); in processInstruction() local
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/external/v8/src/arm64/ |
D | assembler-arm64.h | 1706 static Instr Rn(CPURegister rn) { in Rn() function
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 2589 static Instr Rn(CPURegister rn) { in Rn() function
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