1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #ifndef FREEDRENO_RESOURCE_H_
30 #define FREEDRENO_RESOURCE_H_
31
32 #include "util/list.h"
33 #include "util/u_range.h"
34 #include "util/u_transfer.h"
35
36 #include "freedreno_batch.h"
37 #include "freedreno_util.h"
38
39 /* Texture Layout on a3xx:
40 *
41 * Each mipmap-level contains all of it's layers (ie. all cubmap
42 * faces, all 1d/2d array elements, etc). The texture sampler is
43 * programmed with the start address of each mipmap level, and hw
44 * derives the layer offset within the level.
45 *
46 * Texture Layout on a4xx:
47 *
48 * For cubemap and 2d array, each layer contains all of it's mipmap
49 * levels (layer_first layout).
50 *
51 * 3d textures are layed out as on a3xx, but unknown about 3d-array
52 * textures.
53 *
54 * In either case, the slice represents the per-miplevel information,
55 * but in layer_first layout it only includes the first layer, and
56 * an additional offset of (rsc->layer_size * layer) must be added.
57 */
58 struct fd_resource_slice {
59 uint32_t offset; /* offset of first layer in slice */
60 uint32_t pitch;
61 uint32_t size0; /* size of first layer in slice */
62 };
63
64 struct set;
65
66 struct fd_resource {
67 struct u_resource base;
68 struct fd_bo *bo;
69 uint32_t cpp;
70 enum pipe_format internal_format;
71 bool layer_first; /* see above description */
72 uint32_t layer_size;
73 struct fd_resource_slice slices[MAX_MIP_LEVELS];
74 uint32_t timestamp;
75 /* buffer range that has been initialized */
76 struct util_range valid_buffer_range;
77
78 /* reference to the resource holding stencil data for a z32_s8 texture */
79 /* TODO rename to secondary or auxiliary? */
80 struct fd_resource *stencil;
81
82 /* bitmask of in-flight batches which reference this resource. Note
83 * that the batch doesn't hold reference to resources (but instead
84 * the fd_ringbuffer holds refs to the underlying fd_bo), but in case
85 * the resource is destroyed we need to clean up the batch's weak
86 * references to us.
87 */
88 uint32_t batch_mask;
89
90 /* reference to batch that writes this resource: */
91 struct fd_batch *write_batch;
92
93 /* Set of batches whose batch-cache key references this resource.
94 * We need to track this to know which batch-cache entries to
95 * invalidate if, for example, the resource is invalidated or
96 * shadowed.
97 */
98 uint32_t bc_batch_mask;
99 };
100
101 static inline struct fd_resource *
fd_resource(struct pipe_resource * ptex)102 fd_resource(struct pipe_resource *ptex)
103 {
104 return (struct fd_resource *)ptex;
105 }
106
107 static inline bool
pending(struct fd_resource * rsc,bool write)108 pending(struct fd_resource *rsc, bool write)
109 {
110 /* if we have a pending GPU write, we are busy in any case: */
111 if (rsc->write_batch)
112 return true;
113
114 /* if CPU wants to write, but we are pending a GPU read, we are busy: */
115 if (write && rsc->batch_mask)
116 return true;
117
118 if (rsc->stencil && pending(rsc->stencil, write))
119 return true;
120
121 return false;
122 }
123
124 struct fd_transfer {
125 struct pipe_transfer base;
126 void *staging;
127 };
128
129 static inline struct fd_transfer *
fd_transfer(struct pipe_transfer * ptrans)130 fd_transfer(struct pipe_transfer *ptrans)
131 {
132 return (struct fd_transfer *)ptrans;
133 }
134
135 static inline struct fd_resource_slice *
fd_resource_slice(struct fd_resource * rsc,unsigned level)136 fd_resource_slice(struct fd_resource *rsc, unsigned level)
137 {
138 assert(level <= rsc->base.b.last_level);
139 return &rsc->slices[level];
140 }
141
142 /* get offset for specified mipmap level and texture/array layer */
143 static inline uint32_t
fd_resource_offset(struct fd_resource * rsc,unsigned level,unsigned layer)144 fd_resource_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
145 {
146 struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
147 unsigned offset;
148 if (rsc->layer_first) {
149 offset = slice->offset + (rsc->layer_size * layer);
150 } else {
151 offset = slice->offset + (slice->size0 * layer);
152 }
153 debug_assert(offset < fd_bo_size(rsc->bo));
154 return offset;
155 }
156
157 void fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond, bool discard,
158 enum fd_render_stage stage);
159 void fd_blitter_pipe_end(struct fd_context *ctx);
160
161 void fd_resource_screen_init(struct pipe_screen *pscreen);
162 void fd_resource_context_init(struct pipe_context *pctx);
163
164 void fd_resource_resize(struct pipe_resource *prsc, uint32_t sz);
165
166 bool fd_render_condition_check(struct pipe_context *pctx);
167
168 #endif /* FREEDRENO_RESOURCE_H_ */
169