Searched defs:fmls (Results 1 – 3 of 3) sorted by relevance
/external/llvm/test/MC/AArch64/ |
D | neon-scalar-by-elem-mla.s | 31 fmls d0, d1, v1.d[0] define
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 2656 __ fmls(d27, d30, v6.D(), 0); in GenerateTestSequenceNEONFP() local 2657 __ fmls(s21, s16, v2.S(), 0); in GenerateTestSequenceNEONFP() local 2658 __ fmls(v5.V2D(), v19.V2D(), v21.V2D()); in GenerateTestSequenceNEONFP() local 2659 __ fmls(v18.V2D(), v30.V2D(), v12.D(), 0); in GenerateTestSequenceNEONFP() local 2660 __ fmls(v5.V2S(), v16.V2S(), v7.V2S()); in GenerateTestSequenceNEONFP() local 2661 __ fmls(v3.V2S(), v18.V2S(), v11.S(), 1); in GenerateTestSequenceNEONFP() local 2662 __ fmls(v27.V4S(), v5.V4S(), v30.V4S()); in GenerateTestSequenceNEONFP() local 2663 __ fmls(v26.V4S(), v20.V4S(), v4.S(), 3); in GenerateTestSequenceNEONFP() local
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/external/vixl/src/aarch64/ |
D | logic-aarch64.cc | 4161 LogicVRegister Simulator::fmls(VectorFormat vform, in fmls() function in vixl::aarch64::Simulator 4177 LogicVRegister Simulator::fmls(VectorFormat vform, in fmls() function in vixl::aarch64::Simulator 4391 LogicVRegister Simulator::fmls(VectorFormat vform, in fmls() function in vixl::aarch64::Simulator
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