1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <ixheaacd_type_def.h>
21 #include "ixheaacd_bitbuffer.h"
22 #include "ixheaacd_config.h"
23 #include "ixheaacd_mps_polyphase.h"
24
25 #include "ixheaacd_mps_dec.h"
26 #include "ixheaacd_mps_interface.h"
27
28 #include <ixheaacd_type_def.h>
29 #include "ixheaacd_constants.h"
30 #include <ixheaacd_basic_ops32.h>
31 #include <ixheaacd_basic_ops40.h>
32
33 #include <math.h>
34 #include <memory.h>
35
36 #include <assert.h>
37
38 #undef ABS_THR
39 #define ABS_THR 1.0e-9f
40
41 #define ICC_FIX
42 #define UNSINGULARIZE_FIX
43 #define QUANTIZE_PARS_FIX
44
45 #define PI 3.14159265358979f
46
47 #define ONE_IN_Q28 (268435456)
48 #define MINUS_ONE_IN_Q28 (-268435456)
49 #define PI_Q28 (843314856)
50 #define PI_Q27 (421657428)
51 #define PI_BY_8_Q28 (105414352)
52
53 extern const WORD32 ixheaacd_im_weight_Q28[16][8][31];
54 extern const WORD32 ixheaacd_re_weight_Q28[16][8][31];
55 extern const WORD32 ixheaacd_beta_Q28[16][8][31];
56 extern const WORD32 ixheaacd_weight_Q28[16][8][31];
57 extern const WORD32 ixheaacd_c_l_table_Q31[31];
58 extern const WORD32 ixheaacd_sin_table_Q31[16][31];
59 extern const WORD32 ixheaacd_cos_table_Q31[16][31];
60 extern const WORD32 ixheaacd_atan_table_Q28[16][8][31];
61 extern WORD32 ixheaacd_ipd_de_quant_table_q28[16];
62
63 #define P_PI 3.1415926535897932
64 #define PI_IN_Q28 843314880
65
66 extern WORD32 ixheaacd_ipd_de_quant_table_q28[16];
67
68 #define P_PI 3.1415926535897932
69 #define PI_IN_Q28 843314880
70
ixheaacd_mps_phase_wraping(WORD32 phase)71 static WORD32 ixheaacd_mps_phase_wraping(WORD32 phase) {
72 const WORD32 pi_2 = 2 * PI_IN_Q28;
73
74 while (phase < 0) phase += pi_2;
75 while (phase >= pi_2) phase -= pi_2;
76 assert((phase >= 0) && (phase < pi_2));
77
78 return phase;
79 }
80
ixheaacd_mps_buffer_pre_and_mix_matrix(ia_mps_dec_state_struct * self)81 static VOID ixheaacd_mps_buffer_pre_and_mix_matrix(
82 ia_mps_dec_state_struct *self) {
83 WORD32 pb, row, col;
84
85 for (pb = 0; pb < self->bs_param_bands; pb++) {
86 for (row = 0; row < MAX_M_INPUT; row++) {
87 for (col = 0; col < MAX_M_OUTPUT; col++) {
88 self->m1_param_re_prev[pb][row][col] =
89 self->m1_param_re[self->num_parameter_sets_prev - 1][pb][row][col];
90 self->m1_param_im_prev[pb][row][col] =
91 self->m1_param_im[self->num_parameter_sets_prev - 1][pb][row][col];
92 self->m2_decor_re_prev[pb][row][col] =
93 self->m2_decor_re[self->num_parameter_sets_prev - 1][pb][row][col];
94 self->m2_decor_im_prev[pb][row][col] =
95 self->m2_decor_im[self->num_parameter_sets_prev - 1][pb][row][col];
96 self->m2_resid_re_prev[pb][row][col] =
97 self->m2_resid_re[self->num_parameter_sets_prev - 1][pb][row][col];
98 self->m2_resid_im_prev[pb][row][col] =
99 self->m2_resid_im[self->num_parameter_sets_prev - 1][pb][row][col];
100 }
101 }
102 }
103
104 for (pb = 0; pb < self->bs_param_bands; pb++) {
105 self->phase_l_prev[pb] =
106 self->phase_l[self->num_parameter_sets_prev - 1][pb];
107 self->phase_r_prev[pb] =
108 self->phase_r[self->num_parameter_sets_prev - 1][pb];
109 }
110 }
111
ixheaacd_fix_to_float_int(WORD32 * inp,FLOAT32 * out,WORD32 length,FLOAT32 q_fac)112 VOID ixheaacd_fix_to_float_int(WORD32 *inp, FLOAT32 *out, WORD32 length,
113 FLOAT32 q_fac) {
114 WORD32 i;
115 FLOAT32 m_qfac = 1.0f / q_fac;
116
117 for (i = 0; i < length; i++) out[i] = (FLOAT32)(inp[i]) * m_qfac;
118 }
119
ixheaacd_pre_and_mix_matrix_calculation(ia_mps_dec_state_struct * self)120 VOID ixheaacd_pre_and_mix_matrix_calculation(ia_mps_dec_state_struct *self) {
121 WORD32 ps, pb;
122 ia_mps_bs_frame *curr_bit_stream = &(self->bs_frame);
123 WORD32 h_imag[2 * MAX_PARAMETER_BANDS];
124 WORD32
125 h_real[6 * MAX_PARAMETER_BANDS];
126
127 ixheaacd_mps_buffer_pre_and_mix_matrix(self);
128
129 for (ps = 0; ps < self->num_parameter_sets; ps++) {
130 WORD32 *h_im = &h_imag[0];
131 WORD32 *h_re = &h_real[0];
132 memset(h_real, 0, 6 * MAX_PARAMETER_BANDS * sizeof(WORD32));
133 memset(h_imag, 0, 2 * MAX_PARAMETER_BANDS * sizeof(WORD32));
134
135 switch (self->config->bs_phase_coding) {
136 case 0:
137 if (self->residual_coding) {
138 ixheaacd_mps_par2umx_pred(self, curr_bit_stream, h_imag, h_real, ps,
139 self->res_bands);
140 } else {
141 ixheaacd_mps_par2umx_ps(self, curr_bit_stream, h_real, ps);
142 }
143
144 break;
145 case 1:
146 ixheaacd_mps_par2umx_ps_ipd_opd(self, curr_bit_stream, h_real, ps);
147 break;
148 case 2:
149 ixheaacd_mps_par2umx_pred(self, curr_bit_stream, h_imag, h_real, ps,
150 self->res_bands);
151 break;
152 }
153
154 for (pb = 0; pb < self->bs_param_bands; pb++) {
155 self->m1_param_re[ps][pb][0][0] = 1073741824;
156 self->m1_param_re[ps][pb][1][0] = 1073741824;
157
158 self->m1_param_im[ps][pb][0][0] = 0;
159 self->m1_param_im[ps][pb][1][0] = 0;
160
161 self->m2_resid_re[ps][pb][0][0] = *h_re++;
162 self->m2_resid_im[ps][pb][0][0] = *h_im++;
163 self->m2_resid_im[ps][pb][0][1] = 0;
164
165 self->m2_resid_re[ps][pb][1][0] = *h_re++;
166 self->m2_resid_im[ps][pb][1][0] = *h_im++;
167 self->m2_resid_im[ps][pb][1][1] = 0;
168
169 self->m2_decor_re[ps][pb][0][0] = 0;
170 self->m2_decor_im[ps][pb][0][0] = 0;
171 self->m2_decor_re[ps][pb][0][1] = *h_re++;
172 self->m2_decor_im[ps][pb][0][1] = 0;
173
174 self->m2_decor_re[ps][pb][1][0] = 0;
175 self->m2_decor_im[ps][pb][1][0] = 0;
176 self->m2_decor_re[ps][pb][1][1] = *h_re++;
177 self->m2_decor_im[ps][pb][1][1] = 0;
178
179 self->m2_resid_re[ps][pb][0][1] = *h_re++;
180 self->m2_resid_re[ps][pb][1][1] = *h_re++;
181 }
182 }
183 ixheaacd_mps_smoothing_opd(self);
184
185 ixheaacd_fix_to_float_int(&self->phase_l_fix[0][0], &self->phase_l[0][0],
186 MAX_PARAMETER_SETS_MPS * MAX_PARAMETER_BANDS,
187 268435456.0f);
188 ixheaacd_fix_to_float_int(&self->phase_r_fix[0][0], &self->phase_r[0][0],
189 MAX_PARAMETER_SETS_MPS * MAX_PARAMETER_BANDS,
190 268435456.0f);
191 }
192
ixheaacd_mps_par2umx_ps_core(WORD32 cld[MAX_PARAMETER_BANDS],WORD32 icc[MAX_PARAMETER_BANDS],WORD32 ott_band_count,WORD32 * h_real)193 static VOID ixheaacd_mps_par2umx_ps_core(WORD32 cld[MAX_PARAMETER_BANDS],
194 WORD32 icc[MAX_PARAMETER_BANDS],
195 WORD32 ott_band_count,
196 WORD32 *h_real) {
197 WORD32 band;
198 WORD32 c_l_temp, c_r_temp, cld_idx, icc_idx, temp;
199
200 for (band = 0; band < ott_band_count; band++) {
201 cld_idx = *cld++ + 15;
202 icc_idx = *icc++;
203
204 c_l_temp = (ixheaacd_c_l_table_Q31[cld_idx]);
205 c_r_temp = (ixheaacd_c_l_table_Q31[30 - cld_idx]);
206
207 temp = ixheaacd_cos_table_Q31[icc_idx][cld_idx];
208 *h_real++ = ixheaacd_mult32(temp, c_l_temp) >> 2;
209
210 temp = ixheaacd_cos_table_Q31[icc_idx][30 - cld_idx];
211 *h_real++ = ixheaacd_mult32(temp, c_r_temp) >> 2;
212
213 temp = ixheaacd_sin_table_Q31[icc_idx][cld_idx];
214 *h_real++ = ixheaacd_mult32(temp, c_l_temp) >> 2;
215
216 temp = -ixheaacd_sin_table_Q31[icc_idx][30 - cld_idx];
217 *h_real++ = ixheaacd_mult32(temp, c_r_temp) >> 2;
218
219 h_real += 2;
220 }
221 }
222
ixheaacd_mps_par2umx_ps(ia_mps_dec_state_struct * self,ia_mps_bs_frame * curr_bit_stream,WORD32 * h_real,WORD32 param_set_idx)223 VOID ixheaacd_mps_par2umx_ps(ia_mps_dec_state_struct *self,
224 ia_mps_bs_frame *curr_bit_stream, WORD32 *h_real,
225 WORD32 param_set_idx) {
226 ixheaacd_mps_par2umx_ps_core(curr_bit_stream->cld_idx[param_set_idx],
227 curr_bit_stream->icc_idx[param_set_idx],
228 self->bs_param_bands, h_real);
229 }
230
ixheaacd_mps_opd_calc(ia_mps_dec_state_struct * self,ia_mps_bs_frame * curr_bit_stream,WORD32 param_set_idx,WORD32 opd[MAX_PARAMETER_BANDS])231 static VOID ixheaacd_mps_opd_calc(ia_mps_dec_state_struct *self,
232 ia_mps_bs_frame *curr_bit_stream,
233 WORD32 param_set_idx,
234 WORD32 opd[MAX_PARAMETER_BANDS]) {
235 WORD32 band;
236
237 for (band = 0; band < self->num_bands_ipd; band++) {
238 WORD32 cld_idx = curr_bit_stream->cld_idx[param_set_idx][band] + 15;
239 WORD32 ipd_idx = (curr_bit_stream->ipd_idx[param_set_idx][band]) & 15;
240 WORD32 icc_idx = curr_bit_stream->icc_idx[param_set_idx][band];
241
242 if ((cld_idx == 15) && (ipd_idx == 8))
243 opd[band] = 0;
244 else
245 opd[band] = ixheaacd_atan_table_Q28[ipd_idx][icc_idx][cld_idx];
246 }
247 }
248
ixheaacd_mps_par2umx_ps_ipd_opd(ia_mps_dec_state_struct * self,ia_mps_bs_frame * curr_bit_stream,WORD32 * h_real,WORD32 param_set_idx)249 VOID ixheaacd_mps_par2umx_ps_ipd_opd(ia_mps_dec_state_struct *self,
250 ia_mps_bs_frame *curr_bit_stream,
251 WORD32 *h_real, WORD32 param_set_idx) {
252 WORD32 opd[MAX_PARAMETER_BANDS];
253 WORD32 ott_band_count = self->bs_param_bands;
254 WORD32 num_bands_ipd = self->num_bands_ipd;
255 WORD32 band;
256
257 ixheaacd_mps_par2umx_ps_core(curr_bit_stream->cld_idx[param_set_idx],
258 curr_bit_stream->icc_idx[param_set_idx],
259 ott_band_count, h_real);
260
261 if (self->bs_phase_mode) {
262 ixheaacd_mps_opd_calc(self, curr_bit_stream, param_set_idx, opd);
263
264 for (band = 0; band < num_bands_ipd; band++) {
265 WORD32 ipd_idx = curr_bit_stream->ipd_idx[param_set_idx][band] & 15;
266 WORD32 ipd = ixheaacd_ipd_de_quant_table_q28[ipd_idx];
267
268 self->phase_l_fix[param_set_idx][band] =
269 ixheaacd_mps_phase_wraping(opd[band]);
270 self->phase_r_fix[param_set_idx][band] =
271 ixheaacd_mps_phase_wraping(opd[band] - ipd);
272 }
273 } else {
274 num_bands_ipd = 0;
275 }
276
277 for (band = num_bands_ipd; band < ott_band_count; band++) {
278 self->phase_l_fix[param_set_idx][band] = 0;
279 self->phase_r_fix[param_set_idx][band] = 0;
280 }
281 }
282
ixheaacd_mps_par2umx_pred(ia_mps_dec_state_struct * self,ia_mps_bs_frame * curr_bit_stream,WORD32 * h_imag,WORD32 * h_real,WORD32 param_set_idx,WORD32 res_bands)283 VOID ixheaacd_mps_par2umx_pred(ia_mps_dec_state_struct *self,
284 ia_mps_bs_frame *curr_bit_stream, WORD32 *h_imag,
285 WORD32 *h_real, WORD32 param_set_idx,
286 WORD32 res_bands) {
287 WORD32 band;
288
289 for (band = 0; band < self->bs_param_bands; band++) {
290 WORD32 cld_idx = curr_bit_stream->cld_idx[param_set_idx][band] + 15;
291 WORD32 icc_idx = curr_bit_stream->icc_idx[param_set_idx][band];
292 WORD32 ipd_idx = curr_bit_stream->ipd_idx[param_set_idx][band] & 15;
293
294 if ((band < self->num_bands_ipd) && (cld_idx == 15) && (icc_idx == 0) &&
295 (ipd_idx == 8)) {
296 WORD32 gain = 111848107;
297 *h_imag++ = 0;
298 *h_imag++ = 0;
299
300 if (band < res_bands) {
301 *h_real++ = gain;
302 *h_real++ = gain;
303 h_real += 2;
304
305 *h_real++ = gain;
306 *h_real++ = -gain;
307 } else {
308 *h_real++ = gain;
309 *h_real++ = -gain;
310
311 h_real += 4;
312 }
313 } else {
314 WORD32 weight_fix, re_weight_fix, im_weight_fix;
315
316 weight_fix = ixheaacd_weight_Q28[ipd_idx][icc_idx][cld_idx];
317 re_weight_fix = ixheaacd_re_weight_Q28[ipd_idx][icc_idx][cld_idx];
318 im_weight_fix = ixheaacd_im_weight_Q28[ipd_idx][icc_idx][cld_idx];
319
320 if (band < self->num_bands_ipd) {
321 weight_fix = ixheaacd_weight_Q28[ipd_idx][icc_idx][cld_idx];
322 re_weight_fix = ixheaacd_re_weight_Q28[ipd_idx][icc_idx][cld_idx];
323 im_weight_fix = ixheaacd_im_weight_Q28[ipd_idx][icc_idx][cld_idx];
324 } else {
325 weight_fix = ixheaacd_weight_Q28[0][icc_idx][cld_idx];
326 re_weight_fix = ixheaacd_re_weight_Q28[0][icc_idx][cld_idx];
327 im_weight_fix = ixheaacd_im_weight_Q28[0][icc_idx][cld_idx];
328 }
329
330 *h_real++ = weight_fix - re_weight_fix;
331 *h_imag++ = -im_weight_fix;
332 *h_real++ = weight_fix + re_weight_fix;
333 *h_imag++ = im_weight_fix;
334
335 if (band < res_bands) {
336 h_real += 2;
337
338 *h_real++ = weight_fix;
339 *h_real++ = -weight_fix;
340 } else {
341 WORD32 beta = ixheaacd_beta_Q28[ipd_idx][icc_idx][cld_idx];
342
343 *h_real++ = beta;
344 *h_real++ = -beta;
345 h_real += 2;
346 }
347 }
348 }
349 }
350
ixheaacd_mps_apply_pre_matrix(ia_mps_dec_state_struct * self)351 WORD32 ixheaacd_mps_apply_pre_matrix(ia_mps_dec_state_struct *self) {
352 WORD32 ts, qs, row, col = 0;
353 WORD32 err = 0;
354 err = ixheaacd_mps_upmix_interp(
355 self->m1_param_re, self->r_out_re_scratch_m1, self->m1_param_re_prev,
356 (self->dir_sig_count + self->decor_sig_count), 1, self);
357 if (err < 0) return err;
358 err = ixheaacd_mps_upmix_interp(
359 self->m1_param_im, self->r_out_im_scratch_m1, self->m1_param_im_prev,
360 (self->dir_sig_count + self->decor_sig_count), 1, self);
361 if (err < 0) return err;
362
363 ixheaacd_fix_to_float_int(
364 (WORD32 *)(self->r_out_re_scratch_m1), (FLOAT32 *)(self->r_out_re_in_m1),
365 MAX_TIME_SLOTS * MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT,
366 1073741824);
367 ixheaacd_fix_to_float_int(
368 (WORD32 *)self->r_out_im_scratch_m1, (FLOAT32 *)self->r_out_im_in_m1,
369 MAX_TIME_SLOTS * MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT,
370 1073741824);
371
372 for (ts = 0; ts < self->time_slots; ts++) {
373 for (qs = 0; qs < 2; qs++) {
374 WORD32 sign = -1;
375 WORD32 indx = self->hyb_band_to_processing_band_table[qs];
376 for (row = 0; row < (self->dir_sig_count + self->decor_sig_count);
377 row++) {
378 FLOAT32 sum_real = 0.0f;
379 FLOAT32 sum_imag = 0.0f;
380
381 {
382 FLOAT32 real = self->hyb_in[0][ts][qs].re *
383 self->r_out_re_in_m1[ts][indx][row][col] -
384 self->hyb_in[0][ts][qs].im *
385 self->r_out_im_in_m1[ts][indx][row][col] * sign;
386 FLOAT32 imag = self->hyb_in[0][ts][qs].re *
387 self->r_out_im_in_m1[ts][indx][row][col] * sign +
388 self->hyb_in[0][ts][qs].im *
389 self->r_out_re_in_m1[ts][indx][row][col];
390 sum_real += real;
391 sum_imag += imag;
392 }
393 self->v[row][ts][qs].re = sum_real;
394 self->v[row][ts][qs].im = sum_imag;
395 }
396 }
397 for (qs = 2; qs < self->hyb_band_count; qs++) {
398 WORD32 sign = 1;
399 WORD32 indx = self->hyb_band_to_processing_band_table[qs];
400 for (row = 0; row < (self->dir_sig_count + self->decor_sig_count);
401 row++) {
402 FLOAT32 sum_real = 0.0f;
403 FLOAT32 sum_imag = 0.0f;
404
405 {
406 FLOAT32 real = self->hyb_in[0][ts][qs].re *
407 self->r_out_re_in_m1[ts][indx][row][col] -
408 self->hyb_in[0][ts][qs].im *
409 self->r_out_im_in_m1[ts][indx][row][col] * sign;
410 FLOAT32 imag = self->hyb_in[0][ts][qs].re *
411 self->r_out_im_in_m1[ts][indx][row][col] * sign +
412 self->hyb_in[0][ts][qs].im *
413 self->r_out_re_in_m1[ts][indx][row][col];
414 sum_real += real;
415 sum_imag += imag;
416 }
417 self->v[row][ts][qs].re = sum_real;
418 self->v[row][ts][qs].im = sum_imag;
419 }
420 }
421 }
422 return 0;
423 }
424
ixheaacd_mps_apply_mix_matrix(ia_mps_dec_state_struct * self)425 WORD32 ixheaacd_mps_apply_mix_matrix(ia_mps_dec_state_struct *self) {
426 WORD32 ts, qs, row, col;
427 WORD32 complex_m2 = ((self->config->bs_phase_coding != 0));
428 WORD32 phase_interpolation = (self->config->bs_phase_coding == 1);
429 WORD32 err = 0;
430 err = ixheaacd_mps_upmix_interp(
431 self->m2_decor_re, self->r_diff_out_re_fix_in_m2, self->m2_decor_re_prev,
432 self->out_ch_count, (self->dir_sig_count + self->decor_sig_count), self);
433 if (err < 0) return err;
434 err = ixheaacd_mps_upmix_interp(
435 self->m2_resid_re, self->r_out_re_fix_in_m2, self->m2_resid_re_prev,
436 self->out_ch_count, (self->dir_sig_count + self->decor_sig_count), self);
437 if (err < 0) return err;
438 ixheaacd_fix_to_float_int(
439 (WORD32 *)self->r_out_re_fix_in_m2, (FLOAT32 *)self->r_out_re_in_m2,
440 MAX_TIME_SLOTS * MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT,
441 268435456);
442 ixheaacd_fix_to_float_int(
443 (WORD32 *)self->r_diff_out_re_fix_in_m2,
444 (FLOAT32 *)self->r_out_diff_re_in_m2,
445 MAX_TIME_SLOTS * MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT,
446 268435456);
447
448 if (complex_m2 && !phase_interpolation) {
449 err = ixheaacd_mps_upmix_interp(
450 self->m2_decor_im, self->r_diff_out_im_fix_in_m2,
451 self->m2_decor_im_prev, self->out_ch_count,
452 (self->dir_sig_count + self->decor_sig_count), self);
453 if (err < 0) return err;
454 err = ixheaacd_mps_upmix_interp(
455 self->m2_resid_im, self->r_out_im_fix_in_m2, self->m2_resid_im_prev,
456 self->out_ch_count, (self->dir_sig_count + self->decor_sig_count),
457 self);
458 if (err < 0) return err;
459 ixheaacd_fix_to_float_int(
460 (WORD32 *)self->r_diff_out_im_fix_in_m2,
461 (FLOAT32 *)self->r_out_diff_im_in_m2,
462 MAX_TIME_SLOTS * MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT,
463 268435456);
464 ixheaacd_fix_to_float_int(
465 (WORD32 *)self->r_out_im_fix_in_m2, (FLOAT32 *)self->r_out_im_in_m2,
466 MAX_TIME_SLOTS * MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT,
467 268435456);
468 }
469
470 if (phase_interpolation) {
471 ixheaacd_mps_phase_interpolation(
472 self->phase_l, self->phase_r, self->phase_l_prev, self->phase_r_prev,
473 self->r_out_ph_re_in_m2, self->r_out_ph_im_in_m2, self);
474
475 for (ts = 0; ts < self->time_slots; ts++) {
476 WORD32 pb;
477 for (pb = 0; pb < self->bs_param_bands; pb++) {
478 for (row = 0; row < self->out_ch_count; row++) {
479 for (col = 0; col < (self->dir_sig_count + self->decor_sig_count);
480 col++) {
481 self->r_out_im_in_m2[ts][pb][row][col] =
482 self->r_out_re_in_m2[ts][pb][row][col] *
483 self->r_out_ph_im_in_m2[ts][pb][row];
484 self->r_out_re_in_m2[ts][pb][row][col] =
485 self->r_out_re_in_m2[ts][pb][row][col] *
486 self->r_out_ph_re_in_m2[ts][pb][row];
487
488 self->r_out_diff_im_in_m2[ts][pb][row][col] =
489 self->r_out_diff_re_in_m2[ts][pb][row][col] *
490 self->r_out_ph_im_in_m2[ts][pb][row];
491 self->r_out_diff_re_in_m2[ts][pb][row][col] =
492 self->r_out_diff_re_in_m2[ts][pb][row][col] *
493 self->r_out_ph_re_in_m2[ts][pb][row];
494 }
495 }
496 }
497 }
498 }
499
500 for (ts = 0; ts < self->time_slots; ts++) {
501 for (qs = 0; qs < self->hyb_band_count; qs++) {
502 WORD32 indx = self->hyb_band_to_processing_band_table[qs];
503 for (row = 0; row < self->out_ch_count; row++) {
504 FLOAT32 sum_re_dir = 0;
505 FLOAT32 sum_re_diff = 0;
506 FLOAT32 sum_im_dir = 0;
507 FLOAT32 sum_im_diff = 0;
508 for (col = 0; col < (self->dir_sig_count + self->decor_sig_count);
509 col++) {
510 sum_re_dir += self->w_dir[col][ts][qs].re *
511 self->r_out_re_in_m2[ts][indx][row][col];
512 sum_im_dir += self->w_dir[col][ts][qs].im *
513 self->r_out_re_in_m2[ts][indx][row][col];
514 sum_re_diff += self->w_diff[col][ts][qs].re *
515 self->r_out_diff_re_in_m2[ts][indx][row][col];
516 sum_im_diff += self->w_diff[col][ts][qs].im *
517 self->r_out_diff_re_in_m2[ts][indx][row][col];
518 }
519 self->hyb_dir_out[row][ts][qs].re = sum_re_dir;
520 self->hyb_dir_out[row][ts][qs].im = sum_im_dir;
521 self->hyb_diff_out[row][ts][qs].re = sum_re_diff;
522 self->hyb_diff_out[row][ts][qs].im = sum_im_diff;
523 }
524 }
525 }
526
527 if (complex_m2) {
528 for (ts = 0; ts < self->time_slots; ts++) {
529 for (qs = 0; qs < 2; qs++) {
530 WORD32 indx = self->hyb_band_to_processing_band_table[qs];
531 for (row = 0; row < self->out_ch_count; row++) {
532 FLOAT32 sum_re_dir = self->hyb_dir_out[row][ts][qs].re;
533 FLOAT32 sum_im_dir = self->hyb_dir_out[row][ts][qs].im;
534 FLOAT32 sum_re_diff = self->hyb_diff_out[row][ts][qs].re;
535 FLOAT32 sum_im_diff = self->hyb_diff_out[row][ts][qs].im;
536 for (col = 0; col < (self->dir_sig_count + self->decor_sig_count);
537 col++) {
538 sum_re_dir += self->w_dir[col][ts][qs].im *
539 self->r_out_im_in_m2[ts][indx][row][col];
540 sum_im_dir -= self->w_dir[col][ts][qs].re *
541 self->r_out_im_in_m2[ts][indx][row][col];
542 sum_re_diff += self->w_diff[col][ts][qs].im *
543 self->r_out_diff_im_in_m2[ts][indx][row][col];
544 sum_im_diff -= self->w_diff[col][ts][qs].re *
545 self->r_out_diff_im_in_m2[ts][indx][row][col];
546 }
547 self->hyb_dir_out[row][ts][qs].re = sum_re_dir;
548 self->hyb_dir_out[row][ts][qs].im = sum_im_dir;
549 self->hyb_diff_out[row][ts][qs].re = sum_re_diff;
550 self->hyb_diff_out[row][ts][qs].im = sum_im_diff;
551 }
552 }
553 for (qs = 2; qs < self->hyb_band_count; qs++) {
554 WORD32 indx = self->hyb_band_to_processing_band_table[qs];
555 for (row = 0; row < self->out_ch_count; row++) {
556 FLOAT32 sum_re_dir = self->hyb_dir_out[row][ts][qs].re;
557 FLOAT32 sum_im_dir = self->hyb_dir_out[row][ts][qs].im;
558 FLOAT32 sum_re_diff = self->hyb_diff_out[row][ts][qs].re;
559 FLOAT32 sum_im_diff = self->hyb_diff_out[row][ts][qs].im;
560 for (col = 0; col < (self->dir_sig_count + self->decor_sig_count);
561 col++) {
562 sum_re_dir -= self->w_dir[col][ts][qs].im *
563 self->r_out_im_in_m2[ts][indx][row][col];
564 sum_im_dir += self->w_dir[col][ts][qs].re *
565 self->r_out_im_in_m2[ts][indx][row][col];
566 sum_re_diff -= self->w_diff[col][ts][qs].im *
567 self->r_out_diff_im_in_m2[ts][indx][row][col];
568 sum_im_diff += self->w_diff[col][ts][qs].re *
569 self->r_out_diff_im_in_m2[ts][indx][row][col];
570 }
571 self->hyb_dir_out[row][ts][qs].re = sum_re_dir;
572 self->hyb_dir_out[row][ts][qs].im = sum_im_dir;
573 self->hyb_diff_out[row][ts][qs].re = sum_re_diff;
574 self->hyb_diff_out[row][ts][qs].im = sum_im_diff;
575 }
576 }
577 }
578 }
579 return 0;
580 }
581
ixheaacd_mult32_shl2(WORD32 a,WORD32 b)582 static PLATFORM_INLINE WORD32 ixheaacd_mult32_shl2(WORD32 a, WORD32 b) {
583 WORD32 result;
584 WORD64 temp_result;
585
586 temp_result = (WORD64)a * (WORD64)b;
587 result = (WORD32)(temp_result >> 30);
588
589 return (result);
590 }
591
ixheaacd_mps_upmix_interp(WORD32 m_matrix[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT],WORD32 r_matrix[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT],WORD32 m_matrix_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT],WORD32 num_rows,WORD32 num_cols,ia_mps_dec_state_struct * self)592 WORD32 ixheaacd_mps_upmix_interp(
593 WORD32 m_matrix[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
594 [MAX_M_INPUT],
595 WORD32 r_matrix[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
596 [MAX_M_INPUT],
597 WORD32 m_matrix_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT],
598 WORD32 num_rows, WORD32 num_cols, ia_mps_dec_state_struct *self) {
599 WORD32 ts, ps, pb, row, col, i;
600
601 for (pb = 0; pb < self->bs_param_bands; pb++) {
602 for (row = 0; row < num_rows; row++) {
603 for (col = 0; col < num_cols; col++) {
604 ps = 0;
605 ts = 0;
606 if (MAX_TIME_SLOTS < (self->param_slot_diff[0])) return -1;
607 for (i = 1; i <= (WORD32)self->param_slot_diff[0]; i++) {
608 WORD32 alpha = i * self->inv_param_slot_diff_Q30[ps];
609 WORD32 one_minus_alpha = 1073741824 - alpha;
610 r_matrix[ts][pb][row][col] =
611 ((ixheaacd_mult32_shl2(m_matrix_prev[pb][row][col],
612 one_minus_alpha) +
613 ixheaacd_mult32_shl2(alpha, m_matrix[ps][pb][row][col])));
614 ts++;
615 }
616
617 for (ps = 1; ps < self->num_parameter_sets; ps++) {
618 if (MAX_TIME_SLOTS < (ts + self->param_slot_diff[ps])) return -1;
619 for (i = 1; i <= (WORD32)self->param_slot_diff[ps]; i++) {
620 WORD32 alpha = i * self->inv_param_slot_diff_Q30[ps];
621 WORD32 one_minus_alpha = 1073741824 - alpha;
622 r_matrix[ts][pb][row][col] =
623 ((ixheaacd_mult32_shl2(m_matrix[ps - 1][pb][row][col],
624 one_minus_alpha) +
625 ixheaacd_mult32_shl2(alpha, m_matrix[ps][pb][row][col])));
626 ts++;
627 }
628 }
629 }
630 }
631 }
632 return 0;
633 }
634
ixheaacd_mps_angle_interpolation(FLOAT32 angle1,FLOAT32 angle2,FLOAT32 alpha)635 static FLOAT32 ixheaacd_mps_angle_interpolation(FLOAT32 angle1, FLOAT32 angle2,
636 FLOAT32 alpha) {
637 while (angle2 - angle1 > (FLOAT32)P_PI)
638 angle1 = angle1 + 2.0f * (FLOAT32)P_PI;
639 while (angle1 - angle2 > (FLOAT32)P_PI)
640 angle2 = angle2 + 2.0f * (FLOAT32)P_PI;
641
642 return (1 - alpha) * angle1 + alpha * angle2;
643 }
644
ixheaacd_mps_phase_interpolation(FLOAT32 pl[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS],FLOAT32 pr[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS],FLOAT32 pl_prev[MAX_PARAMETER_BANDS],FLOAT32 pr_prev[MAX_PARAMETER_BANDS],FLOAT32 r_re[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][2],FLOAT32 r_im[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][2],ia_mps_dec_state_struct * self)645 VOID ixheaacd_mps_phase_interpolation(
646 FLOAT32 pl[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS],
647 FLOAT32 pr[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS],
648 FLOAT32 pl_prev[MAX_PARAMETER_BANDS], FLOAT32 pr_prev[MAX_PARAMETER_BANDS],
649 FLOAT32 r_re[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][2],
650 FLOAT32 r_im[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][2],
651 ia_mps_dec_state_struct *self) {
652 WORD32 ts, ps, pb;
653 WORD32 i;
654 for (pb = 0; pb < self->bs_param_bands; pb++) {
655 ps = 0;
656 ts = 0;
657 for (i = 1; i <= self->param_slot_diff[ps]; i++) {
658 FLOAT32 alpha = (FLOAT32)i * self->inv_param_slot_diff[ps];
659 FLOAT32 t;
660
661 t = ixheaacd_mps_angle_interpolation(pl_prev[pb], pl[ps][pb], alpha);
662 r_re[ts][pb][0] = (FLOAT32)cos(t);
663 r_im[ts][pb][0] = (FLOAT32)sin(t);
664
665 t = ixheaacd_mps_angle_interpolation(pr_prev[pb], pr[ps][pb], alpha);
666 r_re[ts][pb][1] = (FLOAT32)cos(t);
667 r_im[ts][pb][1] = (FLOAT32)sin(t);
668 ts++;
669 }
670
671 for (ps = 1; ps < self->num_parameter_sets; ps++) {
672 for (i = 1; i <= self->param_slot_diff[ps]; i++) {
673 FLOAT32 alpha = (FLOAT32)i * self->inv_param_slot_diff[ps];
674 FLOAT32 t;
675
676 t = ixheaacd_mps_angle_interpolation(pl[ps - 1][pb], pl[ps][pb], alpha);
677 r_re[ts][pb][0] = (FLOAT32)cos(t);
678 r_im[ts][pb][0] = (FLOAT32)sin(t);
679
680 t = ixheaacd_mps_angle_interpolation(pr[ps - 1][pb], pr[ps][pb], alpha);
681 r_re[ts][pb][1] = (FLOAT32)cos(t);
682 r_im[ts][pb][1] = (FLOAT32)sin(t);
683 ts++;
684 }
685 }
686 }
687 }
688
ixheaacd_mps_init_pre_and_post_matrix(ia_mps_dec_state_struct * self)689 VOID ixheaacd_mps_init_pre_and_post_matrix(ia_mps_dec_state_struct *self) {
690 memset(self->m1_param_re_prev, 0,
691 MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT * sizeof(WORD32));
692 memset(self->m1_param_im_prev, 0,
693 MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT * sizeof(WORD32));
694 memset(self->m1_param_re_prev, 0,
695 MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT * sizeof(WORD32));
696 memset(self->m2_decor_re_prev, 0,
697 MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT * sizeof(WORD32));
698 memset(self->m2_resid_re_prev, 0,
699 MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT * sizeof(WORD32));
700 memset(self->m2_resid_im_prev, 0,
701 MAX_PARAMETER_BANDS * MAX_M_OUTPUT * MAX_M_INPUT * sizeof(WORD32));
702 }
703