| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | idct32x32_msa.c | 44 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local
128 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local
354 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local
434 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
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| D | idct16x16_msa.c | 15 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vpx_idct16_1d_rows_msa() local
109 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vpx_idct16_1d_columns_addblk_msa() local
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| /external/v8/src/interpreter/ |
| D | bytecode-register.cc | 108 Register reg4, Register reg5) { in AreContiguous()
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| /external/libyuv/files/source/ |
| D | rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
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| D | row_msa.cc | 774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local
826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
1237 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local
1506 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6; in ARGB1555ToARGBRow_MSA() local
1553 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in RGB565ToARGBRow_MSA() local
1648 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGB1555ToYRow_MSA() local
1705 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in RGB565ToYRow_MSA() local
2666 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in I444ToARGBRow_MSA() local
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| D | scale_msa.cc | 133 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 2789 const Register& reg4) { in Include()
2803 const FPRegister& reg4) { in Include()
2823 const Register& reg4) { in Exclude()
2833 const FPRegister& reg4) { in Exclude()
2843 const CPURegister& reg4) { in Exclude()
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| D | assembler-aarch64.cc | 4751 const CPURegister& reg4, in AreAliased()
4790 const CPURegister& reg4, in AreSameSizeAndType()
4811 const VRegister& reg4) { in AreSameFormat()
4824 const VRegister& reg4) { in AreConsecutive()
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 213 Register reg3, Register reg4) { in GetAllocatableRegisterThatIsNotOneOf()
228 const CPURegister& reg3, const CPURegister& reg4, in AreAliased()
265 const CPURegister& reg3, const CPURegister& reg4, in AreSameSizeAndType()
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| /external/v8/src/arm/ |
| D | macro-assembler-arm.cc | 3712 Register reg4, in GetRegisterThatIsNotOneOf()
3738 Register reg4, in AreAliased()
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.cc | 450 CPURegister reg4) { in Printf()
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| D | instructions-aarch32.h | 557 VRegisterList(VRegister reg1, VRegister reg2, VRegister reg3, VRegister reg4) in VRegisterList()
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| /external/v8/src/ppc/ |
| D | macro-assembler-ppc.cc | 4238 Register reg4, Register reg5, in GetRegisterThatIsNotOneOf()
4260 bool AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, in AreAliased()
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| /external/v8/src/ia32/ |
| D | macro-assembler-ia32.cc | 2648 Register reg4, in AreAliased()
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| /external/v8/src/x87/ |
| D | macro-assembler-x87.cc | 2494 Register reg4, in AreAliased()
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| /external/v8/src/s390/ |
| D | macro-assembler-s390.cc | 3184 Register reg4, Register reg5, in GetRegisterThatIsNotOneOf()
5259 bool AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, in AreAliased()
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 6377 Register reg4, in GetRegisterThatIsNotOneOf()
6399 bool AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, in AreAliased()
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 6784 Register reg4, in GetRegisterThatIsNotOneOf()
6806 bool AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, in AreAliased()
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| /external/v8/src/full-codegen/mips64/ |
| D | full-codegen-mips64.cc | 1536 Register reg3, Register reg4) { in PushOperands()
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| /external/v8/src/full-codegen/s390/ |
| D | full-codegen-s390.cc | 1460 Register reg3, Register reg4) { in PushOperands()
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| /external/v8/src/full-codegen/ppc/ |
| D | full-codegen-ppc.cc | 1498 Register reg3, Register reg4) { in PushOperands()
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| /external/v8/src/full-codegen/mips/ |
| D | full-codegen-mips.cc | 1534 Register reg3, Register reg4) { in PushOperands()
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| /external/v8/src/x64/ |
| D | macro-assembler-x64.cc | 5057 Register reg4, in AreAliased()
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