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Searched defs:reg_offset (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/amd/common/
Dac_debug.c132 unsigned reg_offset) in ac_parse_set_reg_packet()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_vec4_visitor.cpp1432 src_reg *reladdr, int reg_offset) in get_scratch_offset()
1481 int reg_offset = base_offset + orig_src.offset / REG_SIZE; in emit_scratch_read() local
1510 int reg_offset = base_offset + inst->dst.offset / REG_SIZE; in emit_scratch_write() local
1726 int reg_offset = base_offset + src.offset / 16; in emit_pull_constant_load() local
Dbrw_ir_fs.h180 reg_offset(const fs_reg &r) in reg_offset() function
Dbrw_ir_vec4.h229 reg_offset(const backend_reg &r) in reg_offset() function
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_winsys.c460 unsigned reg_offset, in amdgpu_read_registers()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_winsys.c665 unsigned reg_offset, in radeon_read_registers()
/external/elfutils/libdw/
Dcfi.h125 reg_offset, /* DW_CFA_offset_extended et al */ enumerator
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_ir.h606 int reg_offset = select.sel() - array->base_gpr.sel(); in get_final_gpr() local
/external/mesa3d/src/amd/vulkan/
Dradv_cmd_buffer.c745 unsigned reg_offset = 0, reg_count = 0; in radv_set_depth_clear_regs() local
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.cc1664 Register reg_offset = mem_op.GetRegisterOffset(); in ComputeAddress() local
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc22382 int64_t reg_offset = INT64_C(0x1087654321); in TEST() local