/external/libavc/common/arm/ |
D | ih264_iquant_itrans_recon_a9.s | 179 vswp d6, d7 @Reverse positions of x2 and x3 define 353 vswp d6, d7 @Reverse positions of x2 and x3 define 601 vswp d1, d8 @ Q0/Q1 = Row order x0/x1 define 602 vswp d3, d10 @ Q2/Q3 = Row order x2/x3 define 603 vswp d5, d12 @ Q4/Q5 = Row order x4/x5 define 604 vswp d7, d14 @ Q6/Q7 = Row order x6/x7 define 717 vswp d1, d8 @ Q0/Q1 = Row order x0/x1 define 718 vswp d3, d10 @ Q2/Q3 = Row order x2/x3 define 719 vswp d5, d12 @ Q4/Q5 = Row order x4/x5 define 720 vswp d7, d14 @ Q6/Q7 = Row order x6/x7 define
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D | ih264_ihadamard_scaling_a9.s | 126 vswp d5, d8 @Q2 = x4, Q4 = x6 define 127 vswp d7, d10 @Q3 = x5, Q5 = x7 define
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/external/libhevc/common/arm/ |
D | ihevc_itrans_recon_8x8.s | 534 vswp d3,d6 define 537 vswp d5,d8 define 768 vswp d3,d6 define 771 vswp d5,d8 define
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D | ihevc_itrans_recon_16x16.s | 1071 vswp d5,d18 define
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/external/llvm/test/MC/ARM/ |
D | neon-vswp.s | 3 vswp d1, d2 define 4 vswp q1, q2 label
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/external/libxaac/decoder/armv7/ |
D | ixheaacd_esbr_fwd_modulation.s | 45 vswp d4, d7 define 46 vswp d5, d6 define
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/external/libmpeg2/common/arm/ |
D | impeg2_idct.s | 802 vswp d3, d6 define 805 vswp d5, d8 define 1040 vswp d3, d6 define 1043 vswp d5, d8 define
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/external/libvpx/libvpx/vpx_dsp/arm/ |
D | loopfilter_8_neon.asm | 480 vswp d0, d4 ; op2 define 481 vswp d5, d17 ; oq2 define
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/external/boringssl/src/crypto/poly1305/ |
D | poly1305_arm_asm.S | 675 vswp d2,d23 define
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 6039 void vswp(DataType dt, DRegister rd, DRegister rm) { vswp(al, dt, rd, rm); } in vswp() function 6040 void vswp(DRegister rd, DRegister rm) { in vswp() function 6043 void vswp(Condition cond, DRegister rd, DRegister rm) { in vswp() function 6048 void vswp(DataType dt, QRegister rd, QRegister rm) { vswp(al, dt, rd, rm); } in vswp() function 6049 void vswp(QRegister rd, QRegister rm) { in vswp() function 6052 void vswp(Condition cond, QRegister rd, QRegister rm) { in vswp() function
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D | assembler-aarch32.cc | 27470 void Assembler::vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) { in vswp() function in vixl::aarch32::Assembler 27491 void Assembler::vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) { in vswp() function in vixl::aarch32::Assembler
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D | disasm-aarch32.cc | 6874 void Disassembler::vswp(Condition cond, in vswp() function in vixl::aarch32::Disassembler 6883 void Disassembler::vswp(Condition cond, in vswp() function in vixl::aarch32::Disassembler
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/external/v8/src/arm/ |
D | assembler-arm.cc | 3956 void Assembler::vswp(DwVfpRegister dst, DwVfpRegister src) { in vswp() function in v8::internal::Assembler 3968 void Assembler::vswp(QwNeonRegister dst, QwNeonRegister src) { in vswp() function in v8::internal::Assembler
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