Searched refs:first_reg (Results 1 – 6 of 6) sorted by relevance
| /art/runtime/gc/space/ |
| D | region_space-inl.h | 279 Region* first_reg = ®ions_[left]; in AllocLarge() local
280 DCHECK(first_reg->IsFree()); in AllocLarge()
281 first_reg->UnfreeLarge(this, time_); in AllocLarge()
290 first_reg->SetTop(first_reg->Begin() + allocated); in AllocLarge()
306 return reinterpret_cast<mirror::Object*>(first_reg->Begin()); in AllocLarge()
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| /art/libdexfile/dex/ |
| D | dex_instruction.cc | 429 uint16_t first_reg = VRegC_3rc(); in DumpString() local
439 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
447 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
455 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
461 os << StringPrintf("%s, {v%d .. v%d}, ", opcode, first_reg, last_reg) in DumpString()
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| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 3902 CpuRegister first_reg = locations->InAt(0).AsRegister<CpuRegister>(); in HandleShift() local
3910 __ shll(first_reg, second_reg); in HandleShift()
3912 __ sarl(first_reg, second_reg); in HandleShift()
3914 __ shrl(first_reg, second_reg); in HandleShift()
3919 __ shll(first_reg, imm); in HandleShift()
3921 __ sarl(first_reg, imm); in HandleShift()
3923 __ shrl(first_reg, imm); in HandleShift()
3932 __ shlq(first_reg, second_reg); in HandleShift()
3934 __ sarq(first_reg, second_reg); in HandleShift()
3936 __ shrq(first_reg, second_reg); in HandleShift()
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| D | instruction_builder.h | 138 uint16_t first_reg,
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| D | code_generator_arm_vixl.cc | 4932 vixl32::Register first_reg = InputRegisterAt(op, 0); in HandleShift() local
4938 __ Lsl(out_reg, first_reg, out_reg); in HandleShift()
4940 __ Asr(out_reg, first_reg, out_reg); in HandleShift()
4942 __ Lsr(out_reg, first_reg, out_reg); in HandleShift()
4948 __ Mov(out_reg, first_reg); in HandleShift()
4950 __ Lsl(out_reg, first_reg, shift_value); in HandleShift()
4952 __ Asr(out_reg, first_reg, shift_value); in HandleShift()
4954 __ Lsr(out_reg, first_reg, shift_value); in HandleShift()
7984 vixl32::Register first_reg = RegisterFrom(first); in VisitBitwiseNegatedRight() local
7990 __ Bic(out_reg, first_reg, second_reg); in VisitBitwiseNegatedRight()
[all …]
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| D | code_generator_x86.cc | 3909 Register first_reg = first.AsRegister<Register>(); in HandleShift() local
3914 __ shll(first_reg, second_reg); in HandleShift()
3916 __ sarl(first_reg, second_reg); in HandleShift()
3918 __ shrl(first_reg, second_reg); in HandleShift()
3927 __ shll(first_reg, imm); in HandleShift()
3929 __ sarl(first_reg, imm); in HandleShift()
3931 __ shrl(first_reg, imm); in HandleShift()
4101 Register first_reg = first.AsRegister<Register>(); in VisitRor() local
4104 __ rorl(first_reg, second_reg); in VisitRor()
4107 __ rorl(first_reg, imm); in VisitRor()
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