Searched refs:op2 (Results 1 – 5 of 5) sorted by relevance
/art/compiler/optimizing/ |
D | codegen_test.cc | 625 HInstruction* op2; in TestComparison() local 628 op2 = graph->GetIntConstant(j); in TestComparison() 632 op2 = graph->GetLongConstant(j); in TestComparison() 641 comparison = new (GetAllocator()) HEqual(op1, op2); in TestComparison() 645 comparison = new (GetAllocator()) HNotEqual(op1, op2); in TestComparison() 649 comparison = new (GetAllocator()) HLessThan(op1, op2); in TestComparison() 653 comparison = new (GetAllocator()) HLessThanOrEqual(op1, op2); in TestComparison() 657 comparison = new (GetAllocator()) HGreaterThan(op1, op2); in TestComparison() 661 comparison = new (GetAllocator()) HGreaterThanOrEqual(op1, op2); in TestComparison() 665 comparison = new (GetAllocator()) HBelow(op1, op2); in TestComparison() [all …]
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D | intrinsics_x86_64.cc | 368 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenMinMaxFP() local 372 __ ucomisd(out, op2); in GenMinMaxFP() 374 __ ucomiss(out, op2); in GenMinMaxFP() 385 __ orpd(out, op2); in GenMinMaxFP() 387 __ orps(out, op2); in GenMinMaxFP() 391 __ andpd(out, op2); in GenMinMaxFP() 393 __ andps(out, op2); in GenMinMaxFP() 410 __ movsd(out, op2); in GenMinMaxFP() 412 __ movss(out, op2); in GenMinMaxFP() 480 CpuRegister op2 = op2_loc.AsRegister<CpuRegister>(); in GenMinMax() local [all …]
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D | intrinsics_arm_vixl.cc | 525 vixl32::SRegister op2 = SRegisterFrom(op2_loc); in GenMinMaxFloat() local 535 __ Vcmp(op1, op2); in GenMinMaxFloat() 546 __ vmov(cond, F32, out, op2); in GenMinMaxFloat() 553 __ Vmov(temp2, op2); in GenMinMaxFloat() 611 vixl32::DRegister op2 = DRegisterFrom(op2_loc); in GenMinMaxDouble() local 618 __ Vcmp(op1, op2); in GenMinMaxDouble() 629 __ vmov(cond, F64, out, op2); in GenMinMaxDouble() 636 __ Vand(F64, out, op1, op2); in GenMinMaxDouble() 642 __ Vorr(F64, out, op1, op2); // assemble op1/-0.0/NaN. in GenMinMaxDouble() 730 vixl32::Register op2 = InputRegisterAt(invoke, 1); in GenMinMax() local [all …]
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D | intrinsics_x86.cc | 524 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); in GenMinMaxFP() local 528 __ ucomisd(out, op2); in GenMinMaxFP() 530 __ ucomiss(out, op2); in GenMinMaxFP() 541 __ orpd(out, op2); in GenMinMaxFP() 543 __ orps(out, op2); in GenMinMaxFP() 547 __ andpd(out, op2); in GenMinMaxFP() 549 __ andps(out, op2); in GenMinMaxFP() 584 __ movsd(out, op2); in GenMinMaxFP() 586 __ movss(out, op2); in GenMinMaxFP() 698 Register op2 = op2_loc.AsRegister<Register>(); in GenMinMax() local [all …]
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D | intrinsics_arm64.cc | 599 Location op2 = locations->InAt(1); in GenMinMaxFP() local 603 FPRegister op2_reg = is_double ? DRegisterFrom(op2) : SRegisterFrom(op2); in GenMinMaxFP() 658 Location op2 = locations->InAt(1); in GenMinMax() local 662 Register op2_reg = is_long ? XRegisterFrom(op2) : WRegisterFrom(op2); in GenMinMax()
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