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Searched refs:vixl32 (Results 1 – 11 of 11) sorted by relevance

/art/compiler/utils/arm/
Dassembler_arm_vixl.h37 namespace vixl32 = vixl::aarch32; variable
42 class ArmVIXLMacroAssembler FINAL : public vixl32::MacroAssembler {
49 : vixl32::MacroAssembler(ArmVIXLMacroAssembler::kDefaultCodeBufferCapacity) {} in ArmVIXLMacroAssembler()
60 void CompareAndBranchIfZero(vixl32::Register rn,
61 vixl32::Label* label,
63 void CompareAndBranchIfNonZero(vixl32::Register rn,
64 vixl32::Label* label,
77 void (func_name)(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { \
78 MacroAssembler::func_name(vixl32::DontCare, rd, rn, operand); \
102 void (func_name)(vixl32::Register rd, const vixl32::Operand& operand) { \
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Dassembler_arm_vixl.cc42 extern const vixl32::Register tr(TR);
44 extern const vixl32::Register mr(MR);
74 void ArmVIXLAssembler::MaybePoisonHeapReference(vixl32::Register reg) { in MaybePoisonHeapReference()
80 void ArmVIXLAssembler::MaybeUnpoisonHeapReference(vixl32::Register reg) { in MaybeUnpoisonHeapReference()
86 void ArmVIXLAssembler::GenerateMarkingRegisterCheck(vixl32::Register temp, int code) { in GenerateMarkingRegisterCheck()
91 vixl32::Label mr_is_ok; in GenerateMarkingRegisterCheck()
102 void ArmVIXLAssembler::LoadImmediate(vixl32::Register rd, int32_t value) { in LoadImmediate()
151 vixl32::Register temp, in AdjustLoadStoreOffset()
152 vixl32::Register base, in AdjustLoadStoreOffset()
248 vixl32::Register reg, in StoreToOffset()
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Djni_macro_assembler_arm_vixl.h205 void Load(ArmManagedRegister dest, vixl32::Register base, int32_t offset, size_t size);
213 vixl32::Label* Entry() { return &exception_entry_; } in Entry()
221 vixl32::Label exception_entry_;
236 vixl32::Label,
239 vixl32::Label* AsArm() { in AsArm()
Djni_macro_assembler_arm_vixl.cc26 namespace vixl32 = vixl::aarch32;
48 static dwarf::Reg DWARFReg(vixl32::Register reg) { in DWARFReg()
52 static dwarf::Reg DWARFReg(vixl32::SRegister reg) { in DWARFReg()
84 ___ Vpush(SRegisterList(vixl32::SRegister(first), POPCOUNT(fp_spill_mask))); in BuildFrame()
147 ___ Vpop(SRegisterList(vixl32::SRegister(first), POPCOUNT(fp_spill_mask))); in RemoveFrame()
175 vixl32::Register temp = temps.Acquire(); in RemoveFrame()
186 ___ Bx(vixl32::lr); in RemoveFrame()
498 3 * vixl32::kMaxInstructionSizeInBytes, in CreateHandleScopeEntry()
505 2 * vixl32::kMaxInstructionSizeInBytes, in CreateHandleScopeEntry()
536 2 * vixl32::kMaxInstructionSizeInBytes, in CreateHandleScopeEntry()
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/art/compiler/optimizing/
Dintrinsics_arm_vixl.cc130 const vixl32::Register& array, in GenSystemArrayCopyBaseAddress()
132 const vixl32::Register& base) { in GenSystemArrayCopyBaseAddress()
145 __ Add(base, array, Operand(RegisterFrom(pos), vixl32::LSL, element_size_shift)); in GenSystemArrayCopyBaseAddress()
154 const vixl32::Register& base, in GenSystemArrayCopyEndAddress()
155 const vixl32::Register& end) { in GenSystemArrayCopyEndAddress()
167 __ Add(end, base, Operand(RegisterFrom(copy_length), vixl32::LSL, element_size_shift)); in GenSystemArrayCopyEndAddress()
194 vixl32::Register dest = InputRegisterAt(instruction_, 2); in EmitNativeCode()
196 vixl32::Register src_curr_addr = RegisterFrom(locations->GetTemp(0)); in EmitNativeCode()
197 vixl32::Register dst_curr_addr = RegisterFrom(locations->GetTemp(1)); in EmitNativeCode()
198 vixl32::Register src_stop_addr = RegisterFrom(locations->GetTemp(2)); in EmitNativeCode()
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Dcode_generator_vector_arm_vixl.cc20 namespace vixl32 = vixl::aarch32;
21 using namespace vixl32; // NOLINT(build/namespaces)
56 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecReplicateScalar()
94 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecExtractScalar()
136 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecReduce()
137 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecReduce()
173 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecNeg()
174 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecNeg()
202 vixl32::DRegister src = DRegisterFrom(locations->InAt(0)); in VisitVecAbs()
203 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecAbs()
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Dcode_generator_arm_vixl.cc45 namespace vixl32 = vixl::aarch32;
46 using namespace vixl32; // NOLINT(build/namespaces)
75 using RegisterList = vixl32::RegisterList;
98 const vixl32::Register kBakerCcEntrypointRegister = r4;
126 static inline void EmitPlaceholderBne(CodeGeneratorARMVIXL* codegen, vixl32::Label* patch_label) { in EmitPlaceholderBne()
129 vixl32::Label placeholder_label; in EmitPlaceholderBne()
134 static inline bool CanEmitNarrowLdr(vixl32::Register rt, vixl32::Register rn, uint32_t offset) { in CanEmitNarrowLdr()
140 EmitAdrCode(ArmVIXLMacroAssembler* assembler, vixl32::Register rd, vixl32::Label* label) in EmitAdrCode()
163 vixl32::Register rd_;
164 vixl32::Label* const label_;
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Doptimizing_cfi_test.cc35 namespace vixl32 = vixl::aarch32;
37 using vixl32::r0;
214 vixl32::Label target; in TEST_ISA()
218 __ Ldr(r0, vixl32::MemOperand(r0)); in TEST_ISA()
Dcode_generator_arm_vixl.h125 VIXLInt32Literal *lit = new VIXLInt32Literal(0, vixl32::RawLiteral::kManuallyPlaced); in JumpTableARMVIXL()
250 void Exchange(vixl32::Register reg, int mem);
324 vixl32::Register class_reg);
411 /*out*/ vixl32::Register* scratch);
416 /*out*/ vixl32::Register* scratch);
514 vixl32::Label* GetFinalLabel(HInstruction* instruction, vixl32::Label* final_label);
757 vixl::aarch32::Register temp = vixl32::Register());
Dscheduler_arm.cc334 SBC, High32Bits(value + 1), vixl32::FlagsUpdate::SetFlags)) { in CanGenerateTest()
338 SBC, High32Bits(value), vixl32::FlagsUpdate::SetFlags)) { in CanGenerateTest()
/art/test/642-fp-callees/
Dinfo.txt1 Regression test for vixl32 backend, which used to incorrectly