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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Ddiv-vec.ll7 ; RUN: | FileCheck %s --check-prefix=ASM
24 ; ASM-LABEL: testVdivFloat4:
34 ; ASM: vdiv.f32 s12, s12, s13
35 ; ASM-NEXT: vmov.f32 s8, s12
36 ; ASM: vdiv.f32 s12, s12, s13
37 ; ASM-NEXT: vmov.f32 s9, s12
38 ; ASM: vdiv.f32 s12, s12, s13
39 ; ASM-NEXT: vmov.f32 s10, s12
40 ; ASM: vdiv.f32 s0, s0, s4
41 ; ASM-NEXT: vmov.f32 s11, s0
[all …]
Drem-vec.ll9 ; RUN: | FileCheck %s --check-prefix=ASM
12 ; ASM-LABEL:Urem4i32:
15 ; ASM-NEXT:.LUrem4i32$entry:
19 ; ASM-LABEL:.LUrem4i32$local$__0:
20 ; ASM-NEXT: udiv r2, r0, r1
21 ; ASM-NEXT: mls r2, r2, r1, r0
22 ; ASM-NEXT: vmov.32 d4[0], r2
24 ; ASM-LABEL:.LUrem4i32$local$__1:
25 ; ASM-NEXT: udiv r2, r0, r1
26 ; ASM-NEXT: mls r2, r2, r1, r0
[all …]
Dcmp-vec.ll7 ; RUN: | FileCheck %s --check-prefix=ASM
22 ; ASM-LABEL:cmpEqV4I32:
29 ; ASM: vceq.i32 q0, q0, q1
38 ; ASM-LABEL:cmpNeV4I32:
45 ; ASM: vceq.i32 q0, q0, q1
46 ; ASM-NEXT: vmvn.i32 q0, q0
57 ; ASM-LABEL:cmpUgtV4I32:
64 ; ASM: vcgt.u32 q0, q0, q1
73 ; ASM-LABEL:cmpUgeV4I32:
80 ; ASM: vcge.u32 q0, q0, q1
[all …]
Dldr-str-more.ll7 ; RUN: | FileCheck %s --check-prefix=ASM
23 ; ASM-LABEL:LoadStoreI1:
28 ; ASM-NEXT:.LLoadStoreI1$entry:
31 ; ASM-NEXT: sub sp, sp, #32
38 ; ASM-NEXT: str r0, [sp, #28]
39 ; ASM-NEXT: # [sp, #28] = def.pseudo
46 ; ASM-NEXT: str r1, [sp, #24]
47 ; ASM-NEXT: # [sp, #24] = def.pseudo
56 ; ASM-NEXT: ldr r0, [sp, #24]
63 ; ASM-NEXT: and r0, r0, #1
[all …]
Dmov-imm.ll7 ; RUN: | FileCheck %s --check-prefix=ASM
25 ; ASM-LABEL: Imm1:
26 ; ASM: mov r0, #1
43 ; ASM-LABEL: rotateFImmAA:
44 ; ASM: mov r0, #680
60 ; ASM-LABEL: rotateEImmAA:
61 ; ASM: mov r0, #2720
77 ; ASM-LABEL: rotateDImmAA:
78 ; ASM: mov r0, #10880
94 ; ASM-LABEL: rotateCImmAA:
[all …]
Dinsert-extract.ll7 ; RUN: | FileCheck %s --check-prefix=ASM
24 ; ASM-LABEL: extract1_v4i32:
30 ; ASM: vmov.32 r0, d0[1]
37 ; ASM-LABEL: extract2_v4i32:
43 ; ASM: vmov.32 r0, d1[0]
51 ; ASM-LABEL: extract3_v8i16:
57 ; ASM: vmov.s16 r0, d0[3]
66 ; ASM-LABEL: extract4_v8i16:
72 ; ASM: vmov.s16 r0, d1[0]
81 ; ASM-LABEL: extract7_v4i8:
[all …]
Dbranch-mult-fwd.ll5 ; RUN: | FileCheck %s --check-prefix=ASM
22 ; ASM-LABEL:mult_fwd_branches:
26 ; ASM-LABEL:.Lmult_fwd_branches$__0:
29 ; ASM-NEXT: sub sp, sp, #12
36 ; ASM-NEXT: str r0, [sp, #8]
37 ; ASM-NEXT: # [sp, #8] = def.pseudo
44 ; ASM-NEXT: str r1, [sp, #4]
45 ; ASM-NEXT: # [sp, #4] = def.pseudo
54 ; ASM-NEXT: mov r0, #0
61 ; ASM-NEXT: ldr r1, [sp, #8]
[all …]
Dcmp.ll7 ; RUN: | FileCheck %s --check-prefix=ASM
22 ; ASM-LABEL:cmpEqI8:
28 ; ASM-NEXT:.LcmpEqI8$entry:
34 ; ASM-NEXT: sub sp, sp, #24
41 ; ASM-NEXT: str r0, [sp, #20]
42 ; ASM-NEXT: # [sp, #20] = def.pseudo
49 ; ASM-NEXT: str r1, [sp, #16]
50 ; ASM-NEXT: # [sp, #16] = def.pseudo
57 ; ASM-NEXT: ldr r0, [sp, #16]
64 ; ASM-NEXT: strb r0, [sp, #12]
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dhsa-globals.ll1 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=ASM %s
16 ; ASM: .type linkonce_odr_global_program,@object
17 ; ASM: .section .bss,#alloc,#write
18 ; ASM: .weak linkonce_odr_global_program
19 ; ASM: linkonce_odr_global_program:
20 ; ASM: .long 0
21 ; ASM: .size linkonce_odr_global_program, 4
23 ; ASM: .type linkonce_global_program,@object
24 ; ASM: .weak linkonce_global_program
25 ; ASM: linkonce_global_program:
[all …]
/external/swiftshader/third_party/subzero/tests_lit/parse_errs/
Dduplicate-fcn-name.test12 ; RUN: | pnacl-bcdis -no-records | FileCheck -check-prefix=ASM %s
14 ; ASM: module { // BlockID = 8
15 ; ASM: version 1;
16 ; ASM: types { // BlockID = 17
17 ; ASM: count 2;
18 ; ASM: @t0 = void;
19 ; ASM: @t1 = void ();
20 ; ASM: }
21 ; ASM: define external void @f0();
22 ; ASM: define external void @f1();
[all …]
Dfcn-value-index-isnt-defined.test14 ; RUN: | not pnacl-bcdis -no-records | FileCheck -check-prefix=ASM %s
16 ; ASM: module { // BlockID = 8
17 ; ASM: version 1;
18 ; ASM: types { // BlockID = 17
19 ; ASM: count 4;
20 ; ASM: @t0 = i32;
21 ; ASM: @t1 = i32 ();
22 ; ASM: @t2 = i8;
23 ; ASM: @t3 = void;
24 ; ASM: }
[all …]
Dinsertelt-wrong-type.test15 ; RUN: | not pnacl-bcdis -no-records | FileCheck -check-prefix=ASM %s
17 ; ASM: function void @f0(<16 x i1> %p0) { // BlockID = 12
18 ; ASM: blocks 1;
19 ; ASM: constants { // BlockID = 11
20 ; ASM: i1:
21 ; ASM: %c0 = i1 1;
22 ; ASM: i8:
23 ; ASM: %c1 = i8 1;
24 ; ASM: i32:
25 ; ASM: %c2 = i32 0;
[all …]
Dbad-intrinsic-arg.test15 ; RUN: | not pnacl-bcdis -no-records | FileCheck -check-prefix=ASM %s
17 ; ASM: module { // BlockID = 8
18 ; ASM: declare external i32 @f0(double);
19 ; ASM: valuesymtab { // BlockID = 14
20 ; ASM: @f0 : "llvm.nacl.setjmp";
21 ; ASM: Error(118:0): Intrinsic llvm.nacl.setjmp expects i8* for argument 1. Found: double
22 ; ASM: }
23 ; ASM: function void @f3(i32 %p0, double %p1) { // BlockID = 12
24 ; ASM: blocks 1;
25 ; ASM: %b0:
[all …]
/external/llvm/test/DebugInfo/COFF/
Dinlining.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 < %s | FileCheck %s --check-prefix=ASM
24 ; ASM: .cv_loc 0 1 13 0 is_stmt 0 # t.cpp:13:0
25 ; ASM: .cv_loc 0 1 14 5 # t.cpp:14:5
26 ; ASM: addl $6, "?x@@3HC"
27 ; ASM: .cv_loc 1 1 9 5 # t.cpp:9:5
28 ; ASM: addl $4, "?x@@3HC"
29 ; ASM: .cv_loc 2 1 3 7 # t.cpp:3:7
30 ; ASM: .cv_loc 2 1 4 5 # t.cpp:4:5
31 ; ASM: addl {{.*}}, "?x@@3HC"
32 ; ASM: .cv_loc 2 1 5 5 # t.cpp:5:5
[all …]
Dlocal-variables.ll1 ; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=ASM
24 ; ASM: f: # @f
25 ; ASM: .cv_file 1 "D:\\src\\llvm\\build\\t.cpp"
26 ; ASM: .cv_loc 0 1 7 0 is_stmt 0 # t.cpp:7:0
27 ; ASM: .seh_proc f
28 ; ASM: # BB#0: # %entry
29 ; ASM: subq $56, %rsp
30 ; ASM: #DEBUG_VALUE: f:param <- [%RSP+52]
31 ; ASM: movl %ecx, 52(%rsp)
32 ; ASM: [[prologue_end:\.Ltmp.*]]:
[all …]
Dregister-variables.ll1 ; RUN: llc < %s | FileCheck %s --check-prefix=ASM
24 ; ASM: f: # @f
25 ; ASM: .Lfunc_begin0:
26 ; ASM: # BB#0: # %entry
27 ; ASM: pushq %rsi
28 ; ASM: subq $32, %rsp
29 ; ASM: #DEBUG_VALUE: f:p <- %ECX
30 ; ASM: movl %ecx, %esi
31 ; ASM: [[p_ecx_esi:\.Ltmp.*]]:
32 ; ASM: #DEBUG_VALUE: f:p <- %ESI
[all …]
Dglobals.ll1 ; RUN: llc < %s | FileCheck %s --check-prefix=ASM
12 ; ASM: .section .debug$S,"dr"
13 ; ASM: .p2align 2
14 ; ASM: .long 4 # Debug section magic
16 ; ASM: .short {{.*-.*}} # Record length
17 ; ASM: .short 4364 # Record kind: S_LDATA32
18 ; ASM: .long 116 # Type
19 ; ASM: .secrel32 "?first@@3HA" # DataOffset
20 ; ASM: .secidx "?first@@3HA" # Segment
21 ; ASM: .asciz "first" # Name
[all …]
/external/llvm/test/MC/Mips/
Dmips-pdr-bad.s2 # RUN: FileCheck %s < %t1 -check-prefix=ASM
6 .ent # ASM: :[[@LINE]]:14: error: expected identifier after .ent
7 .ent bar, # ASM: :[[@LINE]]:19: error: expected number after comma
11 .frame # ASM: :[[@LINE]]:16: error: expected stack register
12 .frame bar # ASM: :[[@LINE]]:16: error: expected stack register
13 .frame $f1, 8, # ASM: :[[@LINE]]:16: error: expected general purpose register
14 .frame $sp # ASM: :[[@LINE]]:20: error: unexpected token, expected comma
15 .frame $sp, # ASM: :[[@LINE]]:21: error: expected frame size value
16 .frame $sp, bar # ASM: :[[@LINE]]:25: error: frame size not an absolute expression
17 .frame $sp, 8 # ASM: :[[@LINE]]:23: error: unexpected token, expected comma
[all …]
/external/swiftshader/third_party/subzero/tests_lit/assembler/mips32/
Dencoding_test_fcmp.ll8 ; RUN: | FileCheck %s --check-prefix=ASM
32 ; ASM-LABEL: fcmpFalseFloat:
33 ; ASM-NEXT: .LfcmpFalseFloat$entry:
34 ; ASM: addiu $v0, $zero, 0
35 ; ASM-NEXT: andi $v0, $v0, 1
36 ; ASM-NEXT: jr $ra
65 ; ASM-LABEL: fcmpFalseDouble:
66 ; ASM-NEXT: .LfcmpFalseDouble$entry:
67 ; ASM: addiu $v0, $zero, 0
68 ; ASM-NEXT: andi $v0, $v0, 1
[all …]
Dencoding_intrinsics.ll8 ; RUN: | FileCheck %s --check-prefix=ASM
42 ; ASM-LABEL: encBswap16
43 ; ASM-NEXT: .LencBswap16$entry:
44 ; ASM-NEXT: andi $a0, $a0, 65535
45 ; ASM-NEXT: sll $v0, $a0, 8
46 ; ASM-NEXT: lui $v1, 255
47 ; ASM-NEXT: and $v0, $v0, $v1
48 ; ASM-NEXT: sll $a0, $a0, 24
49 ; ASM-NEXT: or $v0, $a0, $v0
50 ; ASM-NEXT: srl $v0, $v0, 16
[all …]
Dencoding_test_branch.ll8 ; RUN: | FileCheck %s --check-prefix=ASM
36 ; ASM-LABEL: test_01:
37 ; ASM-LABEL: .Ltest_01$__0:
38 ; ASM-NEXT: # $zero = def.pseudo
39 ; ASM-NEXT: addiu $v0, $zero, 1
40 ; ASM-NEXT: bne $a0, $v0, .Ltest_01$end
41 ; ASM-LABEL: .Ltest_01$end:
42 ; ASM-NEXT: jr $ra
43 ; ASM-LABEL: .Ltest_01$then:
44 ; ASM-LABEL: .Ltest_01$else:
[all …]
/external/v8/src/builtins/
Dbuiltins.h52 #define BUILTIN_LIST(CPP, API, TFJ, TFS, ASM, ASH, DBG) \ argument
53 ASM(Abort) \
55 CODE_AGE_LIST_WITH_ARG(DECLARE_CODE_AGE_BUILTIN, ASM) \
58 ASM(CompileLazy) \
64 ASM(ArgumentsAdaptorTrampoline) \
66 ASM(CallFunction_ReceiverIsNullOrUndefined) \
67 ASM(CallFunction_ReceiverIsNotNullOrUndefined) \
68 ASM(CallFunction_ReceiverIsAny) \
69 ASM(TailCallFunction_ReceiverIsNullOrUndefined) \
70 ASM(TailCallFunction_ReceiverIsNotNullOrUndefined) \
[all …]
/external/skqp/src/jumper/
DSkJumper.cpp71 #define ASM(name, suffix) sk_##name##_##suffix macro
73 #define ASM(name, suffix) _sk_##name##_##suffix macro
82 StartPipelineFn ASM(start_pipeline, skx),
83 ASM(start_pipeline, hsw),
84 ASM(start_pipeline, avx),
85 ASM(start_pipeline, sse41),
86 ASM(start_pipeline, sse2),
87 ASM(start_pipeline, hsw_lowp),
88 ASM(start_pipeline,sse41_lowp),
89 ASM(start_pipeline, sse2_lowp);
[all …]
/external/skia/src/jumper/
DSkJumper.cpp71 #define ASM(name, suffix) sk_##name##_##suffix macro
73 #define ASM(name, suffix) _sk_##name##_##suffix macro
82 StartPipelineFn ASM(start_pipeline, skx),
83 ASM(start_pipeline, hsw),
84 ASM(start_pipeline, avx),
85 ASM(start_pipeline, sse41),
86 ASM(start_pipeline, sse2),
87 ASM(start_pipeline, hsw_lowp),
88 ASM(start_pipeline,sse41_lowp),
89 ASM(start_pipeline, sse2_lowp);
[all …]
/external/llvm/test/Transforms/LoopVectorize/ARM/
Dmul-cast-vect.ll2 ; To see the assembly output: llc -mcpu=cortex-a9 < %s | FileCheck --check-prefix=ASM %s
3 ; ASM lines below are only for reference, tests on that direction should go to tests/CodeGen/ARM
20 ; ASM: vld1.64
22 ; ASM: vld1.64
25 ; ASM: vmul.i32
27 ; ASM: vst1.64
34 ; ASM: vldr
36 ; ASM: vldr
42 ; ASM: vmull.s16
44 ; ASM: vst1.64
[all …]

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