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Searched refs:ATOMIC_CMP_SWAP (Results 1 – 25 of 35) sorted by relevance

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/external/llvm/test/CodeGen/X86/
D2010-10-08-cmpxchg8b.ll7 ; X86TargetLowering::ReplaceNodeResults, case ATOMIC_CMP_SWAP.
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2010-10-08-cmpxchg8b.ll7 ; X86TargetLowering::ReplaceNodeResults, case ATOMIC_CMP_SWAP.
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h615 ATOMIC_CMP_SWAP, enumerator
DSelectionDAGNodes.h967 N->getOpcode() == ISD::ATOMIC_CMP_SWAP ||
1046 return Op == ISD::ATOMIC_CMP_SWAP;
1052 return N->getOpcode() == ISD::ATOMIC_CMP_SWAP ||
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h713 ATOMIC_CMP_SWAP, enumerator
DSelectionDAGNodes.h1100 N->getOpcode() == ISD::ATOMIC_CMP_SWAP ||
1176 return Op == ISD::ATOMIC_CMP_SWAP || Op == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS;
1181 return N->getOpcode() == ISD::ATOMIC_CMP_SWAP ||
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h309 ATOMIC_CMP_SWAP, enumerator
DAMDGPUInstrInfo.td191 def AMDGPUatomic_cmp_swap : SDNode<"AMDGPUISD::ATOMIC_CMP_SWAP",
DSIISelLowering.cpp185 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Custom); in SITargetLowering()
186 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i64, Custom); in SITargetLowering()
241 setTargetDAGCombine(ISD::ATOMIC_CMP_SWAP); in SITargetLowering()
1246 case ISD::ATOMIC_CMP_SWAP: return LowerATOMIC_CMP_SWAP(Op, DAG); in LowerOperation()
2405 return DAG.getMemIntrinsicNode(AMDGPUISD::ATOMIC_CMP_SWAP, DL, Op->getVTList(), in LowerATOMIC_CMP_SWAP()
3007 case ISD::ATOMIC_CMP_SWAP: in PerformDAGCombine()
DAMDGPUISelDAGToDAG.cpp477 case AMDGPUISD::ATOMIC_CMP_SWAP: in Select()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp64 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; in getOperationName()
DLegalizeIntegerTypes.cpp155 case ISD::ATOMIC_CMP_SWAP: in PromoteIntegerResult()
1348 case ISD::ATOMIC_CMP_SWAP: { in ExpandIntegerResult()
1358 ISD::ATOMIC_CMP_SWAP, SDLoc(N), AN->getMemoryVT(), VTs, in ExpandIntegerResult()
DLegalizeDAG.cpp2796 ISD::ATOMIC_CMP_SWAP, dl, cast<AtomicSDNode>(Node)->getMemoryVT(), VTs, in ExpandNode()
2824 ISD::ATOMIC_CMP_SWAP, dl, cast<AtomicSDNode>(Node)->getMemoryVT(), VTs, in ExpandNode()
3777 case ISD::ATOMIC_CMP_SWAP: { in ConvertNodeToLibcall()
DSelectionDAG.cpp463 case ISD::ATOMIC_CMP_SWAP: in AddNodeIDCustom()
4837 assert(Opcode == ISD::ATOMIC_CMP_SWAP || in getAtomicCmpSwap()
4866 assert(Opcode == ISD::ATOMIC_CMP_SWAP || in getAtomicCmpSwap()
/external/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp132 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp137 case ISD::ATOMIC_CMP_SWAP: in PromoteIntegerResult()
1184 case ISD::ATOMIC_CMP_SWAP: in ExpandAtomic()
2394 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, dl, VT, in ExpandIntRes_ATOMIC_LOAD()
DLegalizeDAG.cpp2894 case ISD::ATOMIC_CMP_SWAP: in ExpandAtomic()
3019 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, dl, in ExpandNode()
3056 case ISD::ATOMIC_CMP_SWAP: { in ExpandNode()
DSelectionDAG.cpp424 case ISD::ATOMIC_CMP_SWAP: in AddNodeIDCustom()
3870 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); in getAtomic()
5876 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; in getOperationName()
/external/llvm/test/CodeGen/PowerPC/
DAtomics-64.ll4 ; code for ATOMIC_CMP_SWAP. Currently, it is inserting 32-bit instructions with
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
DAtomics-64.ll4 ; code for ATOMIC_CMP_SWAP. Currently, it is inserting 32-bit instructions with
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp741 OP_TO_LIBCALL(ISD::ATOMIC_CMP_SWAP, SYNC_VAL_COMPARE_AND_SWAP) in getSYNC()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetSelectionDAG.td416 def atomic_cmp_swap : SDNode<"ISD::ATOMIC_CMP_SWAP" , SDTAtomic3,
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td496 def atomic_cmp_swap : SDNode<"ISD::ATOMIC_CMP_SWAP" , SDTAtomic3,
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.cpp478 setOperationAction(ISD::ATOMIC_CMP_SWAP, VT, Custom); in X86TargetLowering()
495 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i128, Custom); in X86TargetLowering()
10391 case ISD::ATOMIC_CMP_SWAP: return LowerCMP_SWAP(Op,DAG); in LowerOperation()
10469 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_CMP_SWAP, dl, VT, in ReplaceATOMIC_LOAD()
10545 case ISD::ATOMIC_CMP_SWAP: { in ReplaceNodeResults()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp631 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i64, Custom); in ARMTargetLowering()
638 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand); in ARMTargetLowering()
5030 case ISD::ATOMIC_CMP_SWAP: in ReplaceNodeResults()

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