| /external/clang/test/CodeGenObjC/ |
| D | property-atomic-bool.m | 4 // CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, i8* %{{.*}} seq_cst
5 // CHECK: %[[TOBOOL:.*]] = trunc i8 %[[ATOMIC_LOAD]] to i1
13 // CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, i8* %{{.*}} unordered
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 607 ATOMIC_LOAD, enumerator
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| D | SelectionDAGNodes.h | 979 N->getOpcode() == ISD::ATOMIC_LOAD ||
1064 N->getOpcode() == ISD::ATOMIC_LOAD ||
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 702 ATOMIC_LOAD, enumerator
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| D | RuntimeLibcalls.h | 406 ATOMIC_LOAD, enumerator
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| D | SelectionDAGNodes.h | 1113 N->getOpcode() == ISD::ATOMIC_LOAD ||
1194 N->getOpcode() == ISD::ATOMIC_LOAD ||
|
| /external/v8/src/compiler/ |
| D | machine-operator.cc | 574 #define ATOMIC_LOAD(Type) \ macro
584 ATOMIC_TYPE_LIST(ATOMIC_LOAD)
585 #undef ATOMIC_LOAD
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 77 case ISD::ATOMIC_LOAD: return "AtomicLoad"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 139 case ISD::ATOMIC_LOAD: in PromoteIntegerResult()
1335 case ISD::ATOMIC_LOAD: ExpandIntRes_ATOMIC_LOAD(N, Lo, Hi); break; in ExpandIntegerResult()
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| D | SelectionDAG.cpp | 476 case ISD::ATOMIC_LOAD: in AddNodeIDCustom()
4893 if (Opcode != ISD::ATOMIC_LOAD) in getAtomic()
4934 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); in getAtomic()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 158 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); in XCoreTargetLowering()
225 case ISD::ATOMIC_LOAD: return LowerATOMIC_LOAD(Op, DAG); in LowerOperation()
969 assert(N->getOpcode() == ISD::ATOMIC_LOAD && "Bad Atomic OP"); in LowerATOMIC_LOAD()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 157 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); in AlphaTargetLowering()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1650 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); in SparcTargetLowering()
1656 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Custom); in SparcTargetLowering()
3083 case ISD::ATOMIC_LOAD: in LowerOperation()
|
| /external/llvm/lib/CodeGen/ |
| D | AtomicExpandPass.cpp | 1313 RTLIB::ATOMIC_LOAD, RTLIB::ATOMIC_LOAD_1, RTLIB::ATOMIC_LOAD_2, in expandAtomicLoadToLibcall()
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| D | TargetLoweringBase.cpp | 417 Names[RTLIB::ATOMIC_LOAD] = "__atomic_load"; in InitLibcallNames()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 239 setTargetDAGCombine(ISD::ATOMIC_LOAD); in SITargetLowering()
3005 case ISD::ATOMIC_LOAD: in PerformDAGCombine()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 121 case ISD::ATOMIC_LOAD: in PromoteIntegerResult()
1116 case ISD::ATOMIC_LOAD: ExpandIntRes_ATOMIC_LOAD(N, Lo, Hi); break; in ExpandIntegerResult()
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| D | SelectionDAG.cpp | 436 case ISD::ATOMIC_LOAD: in AddNodeIDCustom()
4001 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); in getAtomic()
5888 case ISD::ATOMIC_LOAD: return "AtomicLoad"; in getOperationName()
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 440 def atomic_load : SDNode<"ISD::ATOMIC_LOAD", SDTAtomicLoad,
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 520 def atomic_load : SDNode<"ISD::ATOMIC_LOAD", SDTAtomicLoad,
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 198 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); in MipsTargetLowering()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 172 setOperationAction(ISD::ATOMIC_LOAD, VT, Custom); in SystemZTargetLowering()
4533 case ISD::ATOMIC_LOAD: in LowerOperation()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 611 Use->getOpcode() != ISD::ATOMIC_LOAD && in isWorthFoldingADDlow()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 652 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); in ARMTargetLowering()
4986 case ISD::ATOMIC_LOAD: in LowerOperation()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 391 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand); in MipsTargetLowering()
|