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Searched refs:CMP (Results 1 – 25 of 253) sorted by relevance

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/external/blktrace/
Dstrverscmp.c80 #define CMP 2 macro
113 /* S_N */ CMP, CMP, CMP, CMP, CMP, LEN, CMP, CMP, in strverscmp()
114 CMP, CMP, CMP, CMP, CMP, CMP, CMP, CMP, in strverscmp()
115 /* S_I */ CMP, -1, -1, CMP, +1, LEN, LEN, CMP, in strverscmp()
116 +1, LEN, LEN, CMP, CMP, CMP, CMP, CMP, in strverscmp()
117 /* S_F */ CMP, CMP, CMP, CMP, CMP, LEN, CMP, CMP, in strverscmp()
118 CMP, CMP, CMP, CMP, CMP, CMP, CMP, CMP, in strverscmp()
119 /* S_Z */ CMP, +1, +1, CMP, -1, CMP, CMP, CMP, in strverscmp()
120 -1, CMP, CMP, CMP in strverscmp()
143 case CMP: in strverscmp()
/external/llvm/test/CodeGen/Mips/
Dcmov.ll4 … -mcpu=mips32r6 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMP
7 …l -mcpu=mips64r6 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMP
19 ; 32-CMP-DAG: lw $[[R0:[0-9]+]], %got(i3)
20 ; 32-CMP-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
21 ; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R1]], $4
22 ; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $4
23 ; 32-CMP-DAG: or $[[T2:[0-9]+]], $[[T0]], $[[T1]]
24 ; 32-CMP-DAG: lw $2, 0($[[T2]])
30 ; 64-CMP-DAG: ld $[[R0:[0-9]+]], %got_disp(i3)(
31 ; 64-CMP-DAG: daddiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got_disp(i1)
[all …]
Dfcmp.ll6 ; RUN: FileCheck %s -check-prefixes=ALL,32-CMP
14 ; RUN: FileCheck %s -check-prefixes=ALL,64-CMP
26 ; 32-CMP: addiu $2, $zero, 0
30 ; 64-CMP: addiu $2, $zero, 0
50 ; 32-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f14
51 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
52 ; 32-CMP-DAG: andi $2, $[[T1]], 1
54 ; 64-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f13
55 ; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
56 ; 64-CMP-DAG: andi $2, $[[T1]], 1
[all …]
/external/llvm/test/Transforms/InstCombine/
Dicmp-vec.ll11 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> %x, <i8 -128, i8 126>
12 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
20 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> %x, <i8 -2, i8 0>
21 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
29 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> %x, <i8 127, i8 -127>
30 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
38 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i8> %x, <i8 -1, i8 1>
39 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
49 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i8> %x, <i8 -1, i8 -1>
50 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
[all …]
Dabs_abs.ll12 ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
14 ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
27 ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
29 ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
42 ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
44 ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
57 ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
59 ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
72 ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
74 ; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
[all …]
Dicmp.ll165 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 3
166 ; CHECK-NEXT: ret i1 [[CMP]]
176 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, 2
177 ; CHECK-NEXT: ret i1 [[CMP]]
187 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 3
188 ; CHECK-NEXT: ret i1 [[CMP]]
198 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3
199 ; CHECK-NEXT: ret i1 [[CMP]]
209 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3
210 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
/external/llvm/test/CodeGen/AArch64/
Dfast-isel-cmp-vec.ll12 ; CHECK-NEXT: cmeq.2s [[CMP:v[0-9]+]], v0, #0
15 ; CHECK-NEXT: and.8b v0, [[CMP]], [[MASK]]
27 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff
30 ; CHECK-NEXT: and.8b v0, v[[CMP]], [[MASK]]
42 ; CHECK-NEXT: cmeq.4s [[CMP:v[0-9]+]], v0, #0
43 ; CHECK-NEXT: xtn.4h [[CMPV4I16:v[0-9]+]], [[CMP]]
59 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff
62 ; CHECK-NEXT: and.8b [[ZEXT:v[0-9]+]], v[[CMP]], [[MASK]]
75 ; CHECK-NEXT: cmeq.16b [[CMP:v[0-9]+]], v0, #0
78 ; CHECK-NEXT: and.16b v0, [[CMP]], [[MASK]]
[all …]
Dtbz-tbnz.ll12 ; CHECK: sub [[CMP:w[0-9]+]], w0, #12
13 ; CHECK: tbz [[CMP]], #31
30 ; CHECK: sub [[CMP:x[0-9]+]], x0, #12
31 ; CHECK: tbz [[CMP]], #63
48 ; CHECK: sub [[CMP:w[0-9]+]], w0, #12
49 ; CHECK: tbnz [[CMP]], #31
66 ; CHECK: sub [[CMP:x[0-9]+]], x0, #12
67 ; CHECK: tbnz [[CMP]], #63
84 ; CHECK: sub [[CMP:w[0-9]+]], w0, #12
85 ; CHECK: tbnz [[CMP]], #31
[all …]
/external/libhevc/common/arm64/
Dihevc_sao_edge_offset_class3_chroma.s126 CMP x9,#0
136 CMP x12,#0
145 CMP x11,#0
156 CMP x12,#0 //0 != edge_idx
172 CMP x12,#0
181 CMP x11,#0
192 CMP x12,#0 //0 != edge_idx
210 CMP x10,#0
221 CMP x11,#0
230 CMP x14,#0
[all …]
Dihevc_sao_edge_offset_class3.s115 CMP x9,#0
129 CMP x12,#0
136 CMP x11,#0
147 CMP x12,#0 //0 != edge_idx
162 CMP x10,#0
178 CMP x11,#0
184 CMP x14,#0
197 CMP x12,#0
216 CMP x11,#0
223 CMP x5,#0
[all …]
Dihevc_sao_edge_offset_class2_chroma.s129 CMP x9,#0
140 CMP x12,#0
149 CMP x11,#0
161 CMP x12,#0 //0 != edge_idx
180 CMP x12,#0
187 CMP x11,#0
199 CMP x12,#0 //0 != edge_idx
216 CMP x10,#0
229 CMP x11,#0
239 CMP x14,#0
[all …]
Dihevc_inter_pred_chroma_copy.s104 CMP x5,#0 //checks ht == 0
113 CMP x5,#0
141 CMP x8,#0
166 CMP x5,#0
193 CMP x8,#0
212 CMP x5,#0
238 CMP x8,#0
Dihevc_sao_edge_offset_class2.s115 CMP x10,#0
142 CMP x12,#0 //0 != edge_idx
155 CMP x14,#0
189 CMP x12,#0
207 CMP x11,#0
214 CMP x5,#0
232 CMP x7,#16 //Compare wd with 16
235 CMP x8,#4 //Compare ht with 4
242 CMP x6,x7 //col == wd
249 CMP x6,#16 //if(col == 16)
[all …]
/external/libhevc/common/arm/
Dihevc_sao_edge_offset_class3_chroma.s128 CMP r9,#0
138 CMP r12,#0
145 CMP r11,#0
155 CMP r12,#0 @0 != edge_idx
166 CMP r12,#0
173 CMP r11,#0
183 CMP r12,#0 @0 != edge_idx
196 CMP r10,#0
207 CMP r11,#0
214 CMP r14,#0
[all …]
Dihevc_sao_edge_offset_class3.s119 CMP r9,#0
133 CMP r12,#0
138 CMP r11,#0
148 CMP r12,#0 @0 != edge_idx
158 CMP r10,#0
175 CMP r11,#0
179 CMP r14,#0
191 CMP r12,#0
205 CMP r11,#0
211 CMP r5,#0
[all …]
Dihevc_sao_edge_offset_class2_chroma.s130 CMP r9,#0
141 CMP r12,#0
148 CMP r11,#0
159 CMP r12,#0 @0 != edge_idx
173 CMP r12,#0
178 CMP r11,#0
189 CMP r12,#0 @0 != edge_idx
201 CMP r10,#0
214 CMP r11,#0
222 CMP r14,#0
[all …]
/external/libhevc/decoder/arm/
Dihevcd_fmt_conv_420sp_to_420p.s106 CMP r5,#0 @//skip luma if disable_luma_copy is non-zero
120 CMP r6,#16
122 CMP r6,#0
157 CMP r4,#0 @//Swap U and V dest if is_u_first_flag is zero
174 CMP r6,#16
176 CMP r6,#0
/external/swiftshader/src/OpenGL/compiler/
DCommon.h75 template <class K, class D, class CMP = std::less<K> >
76 class TMap : public std::map<K, D, CMP, pool_allocator<std::pair<const K, D> > > {
80 TMap() : std::map<K, D, CMP, tAllocator>() {} in TMap()
82 …TMap(const tAllocator& a) : std::map<K, D, CMP, tAllocator>(std::map<K, D, CMP, tAllocator>::key_c… in TMap()
/external/libhevc/decoder/arm64/
Dihevcd_fmt_conv_420sp_to_420p.s104 CMP x5,#0 ////skip luma if disable_luma_copy is non-zero
118 CMP x6,#16
120 CMP x6,#0
159 CMP x4,#0 ////Swap U and V dest if is_u_first_flag is zero
176 CMP x6,#16
178 CMP x6,#0
/external/llvm/test/CodeGen/ARM/
Datomic-64bit.ll259 ; CHECK: mov [[CMP:[a-z0-9]+]], #0
260 ; CHECK: movwge [[CMP]], #1
261 ; CHECK: cmp [[CMP]], #0
278 ; CHECK-THUMB: mov.w [[CMP:[a-z0-9]+]], #0
279 ; CHECK-THUMB: movge.w [[CMP]], #1
280 ; CHECK-THUMB: cmp.w [[CMP]], #0
302 ; CHECK: mov [[CMP:[a-z0-9]+]], #0
303 ; CHECK: movwhs [[CMP]], #1
304 ; CHECK: cmp [[CMP]], #0
321 ; CHECK-THUMB: mov.w [[CMP:[a-z0-9]+]], #0
[all …]
/external/pcre/dist2/src/
Dpcre2_jit_compile.c500 #undef CMP
569 #define CMP(type, src1, src1w, src2, src2w) \ macro
2358 add_stub(common, CMP(SLJIT_GREATER, STACK_TOP, 0, STACK_LIMIT, 0)); in allocate_stack()
2589 jump = CMP(SLJIT_LESS_EQUAL, TMP1, 0, STR_PTR, 0); in check_start_used_ptr()
2595 jump = CMP(SLJIT_LESS_EQUAL, SLJIT_MEM1(SLJIT_SP), common->start_used_ptr, STR_PTR, 0); in check_start_used_ptr()
2720 jump = CMP(SLJIT_GREATER_EQUAL, SLJIT_MEM1(SLJIT_SP), common->start_used_ptr, STR_PTR, 0); in check_partial()
2722 jump = CMP(SLJIT_EQUAL, SLJIT_MEM1(SLJIT_SP), common->start_used_ptr, SLJIT_IMM, -1); in check_partial()
2746 add_jump(compiler, end_reached, CMP(SLJIT_GREATER_EQUAL, STR_PTR, 0, STR_END, 0)); in check_str_end()
2750 jump = CMP(SLJIT_LESS, STR_PTR, 0, STR_END, 0); in check_str_end()
2753 …add_jump(compiler, end_reached, CMP(SLJIT_GREATER_EQUAL, SLJIT_MEM1(SLJIT_SP), common->start_used_… in check_str_end()
[all …]
/external/tremolo/Tremolo/
Ddpen.s80 CMP r0,#0
89 CMP r7, #3
92 CMP r7, #1
107 CMP r1, #0 @ if (i-read >= 0) === (i >= read)
136 CMP r10,#0x80
139 CMP r8, r7 @ if bit==0 (chase+bit==chase) (sets C)
164 CMP r1, #0 @ if (i-read >= 0) === (i >= read)
194 CMP r10,#0x8000
198 CMP r8, r7 @ if bit==0 (chase+bit==chase) sets C
222 CMP r1, #0 @ if (i-read >= 0) === (i >= read)
[all …]
/external/mesa3d/src/mesa/drivers/dri/i965/
Dtest_vec4_cmod_propagation.cpp154 bld.CMP(dest_null, src_reg(dest), zero, BRW_CONDITIONAL_GE); in TEST_F()
189 bld.CMP(dest_null, src_reg(dest), zero, BRW_CONDITIONAL_GE); in TEST_F()
224 bld.CMP(retype(dest, BRW_REGISTER_TYPE_F), src0, zero, BRW_CONDITIONAL_L); in TEST_F()
259 bld.CMP(bld.null_reg_ud(), src_reg(dest), zero, BRW_CONDITIONAL_GE); in TEST_F()
294 bld.CMP(bld.null_reg_f(), src2, zero, BRW_CONDITIONAL_GE); in TEST_F()
295 bld.CMP(bld.null_reg_f(), src_reg(dest), zero, BRW_CONDITIONAL_GE); in TEST_F()
335 bld.CMP(bld.null_reg_f(), src_reg(dest0), zero, BRW_CONDITIONAL_GE); in TEST_F()
375 bld.CMP(bld.null_reg_f(), offset(src_reg(dest), 8, 2), zero, BRW_CONDITIONAL_GE); in TEST_F()
419 bld.CMP(dest_null, src_reg(dest0), zero, BRW_CONDITIONAL_GE); in TEST_F()
459 bld.CMP(dest_null, tmp_src, zero, BRW_CONDITIONAL_GE); in TEST_F()
[all …]
Dtest_fs_cmod_propagation.cpp109 bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE); in TEST_F()
141 bld.CMP(bld.null_reg_f(), dest, nonzero, BRW_CONDITIONAL_GE); in TEST_F()
173 bld.CMP(bld.null_reg_ud(), dest, zero, BRW_CONDITIONAL_GE); in TEST_F()
207 bld.CMP(bld.null_reg_f(), src2, zero, BRW_CONDITIONAL_GE); in TEST_F()
208 bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE); in TEST_F()
247 bld.CMP(bld.null_reg_f(), dest0, zero, BRW_CONDITIONAL_GE); in TEST_F()
286 bld.CMP(bld.null_reg_f(), offset(dest, bld, 2), zero, BRW_CONDITIONAL_GE); in TEST_F()
326 bld.CMP(bld.null_reg_f(), dest0, zero, BRW_CONDITIONAL_GE); in TEST_F()
363 bld.CMP(bld.null_reg_f(), dest, zero, BRW_CONDITIONAL_GE); in TEST_F()
393 bld.CMP(dest, src0, src1, BRW_CONDITIONAL_GE); in TEST_F()
[all …]
/external/libxaac/decoder/armv7/
Dixheaacd_harm_idx_zerotwolp.s34 CMP r4, #0
36 CMP r12, #0
58 CMP r6, #0
97 CMP r6, #0

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